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Myrl-saki | Just had a thought, assuming you're making a shifter using LUTs as MUXes, assuming MUX2, it's probably a good idea to switch the MUX cases every layer, because it decreases the tail latency. | 18:54 |
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Myrl-saki | s/switch/swap/ | 18:55 |
Myrl-saki | Take 2 latencies, L1 and L2, such that L2 > L1, assume that the "shift" MUX takes L2, then an all-shift would be n*L2, while a no-shift would be n*L1. Ideally, it should be n*(L1 + L2)/2 for both. | 18:57 |
Myrl-saki | I didn't do it here, but | 20:01 |
Myrl-saki | https://github.com/adrianparvino/furv/blob/main/shifter.v | 20:01 |
Myrl-saki | I think this is basically free too. | 20:01 |
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Myrl-saki | I'm flattening 2 layers into 1 layer, it has the same LUT cost, for the most part. | 20:58 |
Myrl-saki | I think? | 20:58 |
povik | new toymap results | 21:00 |
povik | https://github.com/povik/toymap/commit/38cdfec6?short_path=b335630#diff-b335630551682c19a781afebcf4d07bf978fb1f8ac04c6bf87428ed5106870f5 | 21:00 |
Myrl-saki | Ooohhh :o | 21:01 |
Myrl-saki | What does "abc + toymap" mean? | 21:03 |
povik | > On each benchmark LUT4 and LUT6 mappings are attempted, once with ABC, once with toymap, and once with toymap after ABC preprocessed the AIG (labeled abc+toymap) | 21:04 |
povik | AIG being the and-inverter graph | 21:04 |
povik | so you reap the benefits of general logic optimizations done by ABC, but don't let it do the mapping itself | 21:04 |
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