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| tristanC | Hello folks, I'm getting started with fpga through the retroclash book. I somehow managed to generate a bitfile for the nexys a7, but I had to update the prjxray-db files using the project HEAD to add the missing artix7/xc7a50tcsg324-1/part.json file. | 15:51 |
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| tristanC | Is there a conda incantation i could use to do this automatically, or is it expected to copy the missing files from the prjxray-db repository? | 15:52 |
| sf-slack | <acomodi> Hi tristanC! I think that the conda package needs to be bumped to the most recent one: https://github.com/SymbiFlow/symbiflow-examples/blob/7b62455043ea7910a60783dbab87b2107d64f4ab/xc7/environment.yml#L8 | 15:54 |
| sf-slack | <acomodi> https://anaconda.org/LiteX-Hub/prjxray-db/files here is a collection of the prjxray-db packages | 15:56 |
| tristanC | acomodi: perfect, thank you! | 15:58 |
| sf-slack | <manili.devteam> Hi all, Here is a proposal of an idea of mine called vgFPGA. I’ll be so happy to talk about it with other people. So please feel free to contact me via Slack DM. | 16:00 |
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| mithro | acomodi / nelsobe@ - https://github.com/SymbiFlow/symbiflow-arch-defs/pull/2334 | 17:15 |
| mithro | Finally able to reproduce the behaviour that nelsobe was seeing | 17:15 |
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| bl0x | I'm wondering how to use the iserdese2 oversample mode for xc7 platform. vpr complains about missing arch model: Message: Failed to find matching architecture model for 'ISERDESE2' | 23:24 |
| mithro | People here might find https://twitter.com/proppy/status/1466020384063430657?s=20 interesting | 23:32 |
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