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| develonepi3 | mmicko are you online | 17:05 |
|---|---|---|
| develonepi3 | davehah GM. Is QT5 needed for nextnpr only with GUI? | 17:15 |
| daveshah | Yes it's only needed for the gui | 17:23 |
| daveshah | It shouldn't be required if you build without the GUI | 17:23 |
| develonepi3 | davehah Thanks | 17:36 |
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| develonepi3 | daveshah Thanks. I am having an issue with strip in yosys while cross compiling I needd to pass --input-target=elf64-littleaarch64. Any idea? | 17:41 |
| daveshah | No, I have not seen an issue like that before | 17:41 |
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| meawoppl | heyo, got a weird question for the Yosys crew | 19:31 |
| meawoppl | is there a way on the ice40 to use an input as both a lvds pair, and normal input pin? | 19:36 |
| meawoppl | I am trying to detect the mipi transition to HS mode, which looks logic-low of both of the paired elements, but I am unclear how to wire that | 19:37 |
| meawoppl | when I do the intuitive route I get something like: | 19:37 |
| meawoppl | ```ERROR: PACKAGE_PIN of SB_IO 'myCamera.myMIPI.lp_compare' connected to more than a single top level IO.ERROR: Packing design failed.``` | 19:37 |
| daveshah | No, LVDS mode cannot be used at the same time as a normal input pin | 19:37 |
| daveshah | You would have to connect the MIPI signals to two pairs of pins separately | 19:38 |
| daveshah | use one as LVDS and one as single ended (the latter needs to be either 1.2V IO or using two pairs and the LVDS comparators against a 0.6V threshold) | 19:38 |
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| meawoppl | gotcha, thanks daveshah! | 19:41 |
| meawoppl | I have been looking at your implementations of more sophisticated bits for help btw: https://github.com/daveshah1/CSI2Rx/blob/master/vhdl_rx/mipi-csi-rx/csi_rx_hs_lane_phy.vhd | 19:41 |
| tpb | Title: CSI2Rx/csi_rx_hs_lane_phy.vhd at master · daveshah1/CSI2Rx · GitHub (at github.com) | 19:42 |
| meawoppl | Its also been an interesting process trying to decode a signal that I don't have the spec for ;p | 19:44 |
| meawoppl | thankfully there are a fair number of good refs out there | 19:44 |
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| whitequark | meawoppl: you need mipi specs? | 20:26 |
| whitequark | https://twitter.com/crabbyraccoon/status/1128779381382549504 | 20:26 |
| whitequark | er | 20:26 |
| whitequark | don't click that please | 20:26 |
| whitequark | https://cloud.whitequark.org/s/32TAFkge8RB4oLS | 20:26 |
| tpb | Title: whitequarks cloud (at cloud.whitequark.org) | 20:27 |
| whitequark | sorry for mispaste | 20:27 |
| ZirconiumX | Pffft | 20:31 |
| whitequark | nextcloud has a nasty tendency to update the clipboard with a small delay | 20:32 |
| whitequark | usually it's benign | 20:32 |
| meawoppl | epic mispaste ;p | 20:32 |
| meawoppl | but | 20:32 |
| meawoppl | super thanks | 20:33 |
| sorear | I’ve seen worse | 20:33 |
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| piegames1 | https://github.com/ZipCPU/wb2axip/blob/master/bench/formal/faxil_slave.v#L286 | 22:36 |
| tpb | Title: wb2axip/faxil_slave.v at master · ZipCPU/wb2axip · GitHub (at github.com) | 22:36 |
| piegames1 | `if ((f_past_valid)&&($past(i_axi_reset_n)))` | 22:36 |
| piegames1 | zipcpu: Why does it check the reset on the *last* cycle instead of the current one? | 22:36 |
| ZirconiumX | I think it's so the condition triggers after at least one cycle has passed | 22:40 |
| ZirconiumX | (i.e. not on the very first cycle) | 22:40 |
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| piegames1 | ZirconiumX: I think you misunderstood me. I'm not asking why `f_past_valid` is checked, but why `$past(i_axi_reset_n)` is used instead of `i_axi_reset_n`. | 23:42 |
| ZirconiumX | piegames1: that's what I was answering | 23:43 |
| ZirconiumX | $past does not trigger on the first cycle as I understand it | 23:43 |
| piegames1 | My concrete problem is: I have a situation where VALID is set but not READY. The assertions state that VALID must hold until READY was set. But if I have a RESET during this situation, there is one cycle where my valid went low (because of the reset), but the assert still triggers because the if only checks that there was no reset in the *last* cycle. Therefore, this fails verification of my design | 23:47 |
| piegames1 | even if I think the bevhaviour of my component is correct. | 23:47 |
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