Tuesday, 2019-09-24

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whitequark18:23 <rjo> Well. It doesn't do anything on ice40 because the parameter is ignored by nextpnr...15:53
whitequarki would suggest filing a nextpnr bug15:53
daveshahA bug was filed and the issue was fixed :)15:53
whitequarkoh oops, i should've checked.15:54
emilydaveshah: your latency-to-merged-fix is truly impressive15:54
emilyI felt guilty throwing up a 10k line RTLIL tarball15:54
whitequarkZirconiumX: re: flowmap crash15:54
whitequarkhave you seen the bugpoint pass?15:54
daveshahThese small things are usually easier to fix there and then rather than put on the todo list15:54
ZirconiumXwhitequark: I was using that very pass to try to find it15:55
ZirconiumXUnfortunately because flowmap -relax takes forever I didn't get very far with it before turning my computer off for the night15:55
whitequarkhm15:55
whitequarkit should not take forever15:55
ZirconiumX(metaphorically)15:55
whitequarkit's polynomial complexity in theory, and should be pretty fast in practice15:55
whitequarkah15:55
ZirconiumXIt's "I just turned Yosys into Quartus" speed15:56
whitequarkhmmm15:56
whitequarkstill seems like a problem15:56
whitequarkflowmap *ought* to be fast. faster than abc in some cases, even15:56
ZirconiumXMy experience has been the very opposite, sadly.15:56
whitequarkthen that seems like a bug15:57
whitequarkthat said, i haven't had time to work on flowmap much15:57
ZirconiumXSo, my benchmark here is aoR300015:59
ZirconiumXWhich is a MIPS R3000 softcore15:59
whitequarkthat's pretty huge16:00
whitequarki've never tested flowmap on anything larger than picorv3216:00
ZirconiumXUsing my experimental Cyclone synthesis script, Yosys takes 35.87 seconds clock time to build it16:01
ZirconiumXs/build/synthesise/16:01
ZirconiumXYosys says most of the CPU time is spent in techmap there16:02
daveshahOften the case16:02
ZirconiumXWell I've got to spend a lot of time renaming cells, but that's just life16:03
ZirconiumXYaaay Quartus...16:03
ZirconiumXwhitequark: It spends a very long time labelling cells16:04
whitequarklabelling?16:04
whitequarkoh, interesting16:04
whitequarkthat seems like a clear bug16:04
ZirconiumXSo, that was 2m57.914s to build the same code16:04
ZirconiumXYosys says 154 seconds of the 165 seconds of CPU time was spent in flowmap16:05
ZirconiumXAnd it leaks cells to boot.16:05
whitequarkleaks cells?16:05
ZirconiumXWhen it fails to map a cell I ask it to map16:06
ZirconiumXI call that a cell leak16:06
whitequarkah16:06
ZirconiumXhttps://pastebin.com/vaRCJ1fv <-- e.g. these $_AND_ cells should be LUTs16:07
whitequarkwhich cells specifically?16:07
whitequarkaha16:07
whitequarkseems clearly broken16:07
ZirconiumXflowmap -maxlut 6 -cells $_AND_,$_MUX_,$_NOT_,$_OR_,$_XOR_16:07
whitequarkyeah that should work16:07
ZirconiumXAnd then if I specify -relax, well16:08
ZirconiumXJust hit enter16:08
ZirconiumXI'll let you know the error message in about fifteen minutes or so16:09
whitequarkright, i suspect one problem is that it doesn't partition the graph currently16:09
ZirconiumXWhile this runs I guess I'll add differential I/O for vendor.altera16:10
ZirconiumXwhitequark: ERROR: Assert `(int)lut_edges_bw[succ].size() < order' failed in passes/techmap/flowmap.cc:829.16:11
ZirconiumX2m47.232s16:11
whitequarkinteresting16:12
Ultrasauce<ZirconiumX> It's "I just turned Yosys into Quartus" speed16:17
Ultrasauceah yes this will go well with the license server PR im writing16:17
ZirconiumXYou're welcome, Ultrasauce :P16:17
daveshahWell, there's a version of Yosys with a license manager already16:17
daveshahalbeit somewhat nicer than flexlm16:17
* whitequark senses a conflict of interest within16:20
ZirconiumXAs a side note I'm still highly confused about Yosys BRAM parameters, which is why there's a $__MISTRAL_MLAB leaking too16:24
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ZirconiumXWell, bugpoint is slowly progressing16:53
ZirconiumXWould be nice if the crash didn't take yonks to occur16:54
whitequarkthe idea behind bugpoint (the LLVM pass) is that CPU time is much cheaper than engineer time16:56
whitequarkit was written by Google originally I think.16:56
whitequarkso they can just throw stuff at some compute and forget about it.16:56
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emilyunfortunately, people have to pay the same amount for all our time17:02
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ZirconiumXwhitequark: So I wasn't specific enough with my grep17:40
ZirconiumXERROR: Assert `lut_edges_fw[maybe_mergeable_pair.first][maybe_mergeable_pair.second]' failed in passes/techmap/flowmap.cc:113117:40
ZirconiumXAssert `current_val[i].wire != NULL || current_val[i] == value.bits[i]' failed in ./kernel/consteval.h:7917:40
whitequarkhm17:40
ZirconiumXSo, I was kinda dumb, but oh well17:41
ZirconiumXI found a completely unrelated bug17:41
ZirconiumXyay17:41
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janrinzenextpnr-ecp5 gives me results from 55 MHz up to 74 Mhz for the same design in different runs with -r enabled22:11
janrinzeany clue on how to get the most out of nextpnr?22:11
ZirconiumXjanrinze: The thing about basically all PnR algorithms is that they're probabilistic22:17
ZirconiumXThere is no way to "get the most out of nextpnr" other than to keep rolling the dice until you get lucky22:17
whitequarkthat's not entirely true22:20
whitequarkyou could make a fully analytical pnr22:20
ZirconiumXI'm pretty sure PnR is NP though, right?22:21
whitequarkif you want to do it optimally, yes22:21
emilythere are two wolves in my brain. one of them thinks placing should be entirely analytic. the other is mumbling something about neural net pnr22:22
whitequarkbut you don't need to do it optimally, do you? e.g. you can compute a series of approximate solutions that would converge to the optimal one at some point, and just never actually do it22:23
janrinzeI'm thinking about a loop that reruns nextpnr several times until it gets a good result. It might be interesting to optimize that method by only keeping the fastest result22:23
whitequarkinterestingly, nextpnr became much faster with a semi-analytical placer22:23
janrinzei just had two hits in a row where the results are >72 MHz. lucky streak?22:24
sorearthere’s no reason in principle for a deterministic approximation algorithm to be impossible22:28
janrinzesorear: but there is also no reason for that algorithm to produce the most optimal result..22:29
janrinzesorear: it's about having a deteministic algorthm that also finds the optimal result.22:30
whitequarkjanrinze: it's not possible to have optimal pnr22:31
whitequark(for any realistic fpga and design)22:31
whitequarkjust like it's not possible to emit optimal machine code22:32
whitequark(for any realistic cpu and program)22:32
janrinzewhitequark: optimal != perfect22:32
whitequarki'm not sure what you mean by "perfect" but if the goal of a pnr algorithm is to optimize your design for speed, "optimal" means "highest possible fmax"22:32
janrinzewhitequark: optimal means the configuration that is the best fit within the possible solutions the system can provide.22:33
whitequarkyes. that's the same thing.22:33
janrinzehighest possible fmax could be achieved in many ways we don't even have knowledge of today.22:33
whitequarkfor many of my designs i don't even care what fmax is as long as it meets the constraints22:36
ZirconiumXGenerally there's a "fast enough" point, yeah.22:37
whitequarkif the constraints are external and static, i actually *don't* want pnr to try harder. i just want it to meet my 48 MHz or whatever as quickly as possible22:37
ZirconiumXFor all the shit I give Quartus, it's pretty good at that22:38
janrinzetrue, that. But it's a bit of a Pita if that fmax is only achieved 1 out of 10 runs.22:38
whitequarkthat's certainly true22:38
whitequarkmaybe there should be some sort of flag for nextpnr that says "if you didn't meet constraints, rip up and try again"22:38
janrinzeI have 3 results that are >74 MHz. constraint is 72 Mhz. but often it only reaches 56 or 58 MHz. The variation is quite a lot. ( 18/56 => 32% )22:41
whitequarkisn't it 22%22:44
whitequarkstill a lot22:44
whitequarkprobably stuck in a local minimum of some sort22:44
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janrinzeI do think that it's doing a great job though.22:53
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promachFor nextPnR-ice40 , How to generate the json file for a particular verilog code design ?23:52

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