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| promach | daveshah : should I put up a github issue for https://www.eevblog.com/forum/fpga/asynchronous-reset-mechanism-of-d-flip-flop-in-yosys/?all ? | 01:18 |
|---|---|---|
| tpb | Title: asynchronous reset mechanism of D flip-flop in yosys - Page 1 (at www.eevblog.com) | 01:18 |
| promach | I am not sure that yosys-smtbmc tool is giving the right formal verification results | 01:18 |
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| emeb_mac | on a lark, building icestorm/yosys/nextpnr on an RPi 4 | 02:42 |
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| futarisIRCcloud | emeb_mac: Should work fine. I've built it on an android termux. | 02:56 |
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| emeb_mac | futarisIRCcloud: seems to be working so far. Slow, but no big issues yet (about 1/2-way thru yosys now) | 03:01 |
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| emeb_mac | well, icestorm and yosys build OK, but nextpnr fails | 03:50 |
| emeb_mac | nextpnr/3rdparty/qtimgui/ImGuiRenderer.h:57:5: error: ‘QOpenGLFunctions_3_2_Core’ does not name a type; did you mean ‘QOpenGLFunctionsPrivate’? | 03:51 |
| emeb_mac | is it possible to configure the nextpnr build to leave out the GUI stuff? probably not needed on a headless system. | 03:55 |
| emeb_mac | try cmake w/ -DBUILD_GUI=OFF I guess | 04:00 |
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| Xark | emeb_mac: I tried this recently (on a 3...) and got past here, but was blocked by a problem with mutexes at run-time IIRC. | 04:51 |
| emeb_mac | Xark: nextpnr built w/ GUI disabled. trying out tools now | 04:57 |
| emeb_mac | yosys-abc has been spinning on a simple design for the last 10min w/o finishing. | 04:57 |
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| Xark | emeb_mac: Hopefully it works. My Pi4 should arrived soon (I for sure needed fans and swap on the Pi3...took a while too). :) | 04:58 |
| Xark | emeb_mac: I did get it working for regular ice40-8K (with archnepnr vs nextpnr). | 04:59 |
| Xark | emeb_mac: I think I tried maybe a month or more ago (so ancient history). :) | 05:00 |
| emeb_mac | Xark: this is my HX8K-based icestick 6502 design. It builds in a few sec on my i3 system. been running for the last 15 min or so and seems stuck at ABC: + mfs2 step | 05:01 |
| emeb_mac | this is a 2GB RAM version of Pi4 and top reports that it's only using 0.7% of memory. | 05:01 |
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| Xark | emeb_mac: Yeah, IIRC my memory issues were compiling (1GB and I think I had a browser window open). I think I used -j2 (-j4 was a bad idea I found). | 05:03 |
| emeb_mac | yeah - I never use -j on systems with small memory. straight make w/o -j works fine (if slowly) | 05:04 |
| Xark | emeb_mac: I also compiled RISC-V toolchain (overnight)... | 05:04 |
| Xark | emeb_mac: But all those bars in htop looked so empty... :) | 05:05 |
| emeb_mac | haha | 05:05 |
| emeb_mac | well, I gave up and aborted. yosys-abc had been running on this for ~30min w/o evidence of progress. I suspect something wrong somewhere. | 05:19 |
| emeb_mac | now trying with a different design. it also seems hung in yosys-abc | 05:19 |
| Xark | emeb_mac: Was it using CPU (or wedged on mutex)? | 05:24 |
| emeb_mac | It's using 100% of one CPU | 05:25 |
| emeb_mac | and a tiny amount of RAM (0.6% in the current case) | 05:25 |
| Xark | emeb_mac: I see. Kind of a bummer. | 05:26 |
| Xark | emeb_mac: Presumably Pi related? | 05:26 |
| emeb_mac | Xark: when you build these 6502 designs do you ever see this? "ABC: Warning: The network is combinational (run "fraig" or "fraig_sweep")." | 05:27 |
| emeb_mac | I've seen that before while building on PC but it doesn't seem to hurt anything | 05:27 |
| Xark | emeb_mac: Hmm, a lot of spam, but I don't recall seeing that... | 05:27 |
| * Xark greps | 05:28 | |
| emeb_mac | I see it on PC for sure but the design builds fine | 05:30 |
| Xark | emeb_mac: Yeah, it is there. | 05:30 |
| emeb_mac | and PC blows right past the yosys-abc stuff that hangs on the Pi. | 05:30 |
| Xark | emeb_mac: Like I mentioned, I have gotten some designs to build and run on the Pi (but not with arachne-pnr). I believe I got the RiscRV32 "PicoSoC" build and running (hence the RISC-V toolchain build I mentioned). | 05:31 |
| Xark | Er, PicoRV32 :) | 05:32 |
| * Xark also remembers a lot of pauses on the Pi that were not noticeable on his PC. :) | 05:32 | |
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| pepijndevos_ | Is there a way to control fan-out in abc? It seems to want to insert buffer chips above a certain threshold. | 08:30 |
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| pepijndevos_ | ZirconiumX, https://twitter.com/pepijndevos/status/1149612117173010433 | 09:40 |
| ZirconiumX | pepijndevos_: Have you made any optimisation to placement, or are you just dropping them in a grid as you go? | 09:41 |
| pepijndevos_ | ZirconiumX, it's just droppign them in a grid. There is no placement info in the netlist at all. I think Kicad ist just doing this. | 09:43 |
| ZirconiumX | Ouch | 09:43 |
| pepijndevos_ | Which wont stop me from running the autorouter on it and watching it burn | 09:44 |
| pepijndevos_ | Skidl is *really* slow btw, the picorv32 has not yet completed generating the netlist. the 6502 took a looong time as well. | 09:46 |
| pepijndevos_ | I think we could look into graywolf and qrouter if we want to do bigger things than you can place by hand in Kicad. | 09:50 |
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| cr1901_modern | https://github.com/YosysHQ/yosys/commit/e2fb8ebe86f49523168c413c734ce4690d740351#diff-04c6e90faac2675aa89e2176d2eec7d8L266 I never understood what this line meant in the README and now it's gone. What does/did it mean for yosys to synthesize "latched logic as feedback loops"? | 23:34 |
| tpb | Title: Update README · YosysHQ/yosys@e2fb8eb · GitHub (at github.com) | 23:34 |
| sorear | have you ever seen two back to back NOR gates in a book? | 23:39 |
| cr1901_modern | yes I know what a latch looks like | 23:39 |
| cr1901_modern | I guess my question is... "in the past did yosys emulate latches using a mux that fed back the output to input with one clock cycle delay?" | 23:49 |
| sorear | Not a “clock cycle” delay - a combinatorial loop | 23:52 |
| cr1901_modern | I don't see how that's "emulating" a latch then. The whole point of a latch is that the output gets fed back to the input. | 23:53 |
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