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| benreynwar | I'm using 'flatten' and 'opt_clean -purge' with symbiyosys to reduce the size of my design and make it more tractable. It's working well, but is causing me some difficulties when viewing the waveform. If I have a signal that exists in several different modules, it will only be present in one of them in the waveform. Presumably during the "opt_clean -purge" it was removed from all the others. Is it possible to do remove | 17:41 |
|---|---|---|
| benreynwar | all the irrelevant logic, but still keep multiple aliases for the same signal to make viewing the waveform simpler? | 17:41 |
| benreynwar | If I do 'opt_clean' without the -purge option that seems to work, although it does noticeably slow down the solving. | 18:03 |
| daveshah | I think that this is what opt_clean should do | 18:12 |
| daveshah | It should move the alias nets out of any functional path, just keep them as aliases | 18:12 |
| daveshah | Perhaps we could look into an optimisation not to pass these to the solver but readd them to the vcd | 18:13 |
| daveshah | I don't know the solver side of Yosys to know how useful or feasible that would be | 18:13 |
| benreynwar | daveshah: Ok thanks. It's still going at a pretty good speed. It's possible the difference is in my head. | 18:28 |
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| benreynwar | When I'm stubbing out a submodule I'm currently just leaving the inputs and outputs to that module hanging. Symbiyosys then treats the undriven outputs from the submodule as degrees of freedom like the top level inputs, which is the behavior that I want. However I'm wondering whether the use of 'opt_clean' might interfere with this. I'm currently getting behavior where it feels like 'opt_clean' is removing logic from the | 20:54 |
| benreynwar | design that should effect the assumptions and assertions that I'm making. It's also not possible to tell from the waveform what logic has been removed and what hasn't. For example a shift register has been optimized out of the design and the output is now tied to '0'. It would have been nicer to see an 'X' in the waveform so it's clearer what is really '0' and what is just logic that has been cleaned out. Currently I'm | 20:54 |
| benreynwar | inspecting the IL manually to make sense of what's happening. | 20:54 |
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