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| cr1901_modern | I concluded making 74xx series lib isn't worth it b/c there's too much latch/async-based parts and that's just not how most HDL code is written. I do appreciate that someone is trying tho :P. | 02:03 |
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| ZirconiumX | cr1901_modern: true, but there's still a fairly useful subset of gates | 10:22 |
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| trmm | Are there any examples of using TRELLIS_IO for tristate outputs? All of the ones in prjtrellis/examples are either INPUT or OUTPUT. | 10:25 |
| daveshah | trmm: yes https://github.com/daveshah1/ulx3s/blob/master/rtl/verilog/orpsoc_top.v#L426 | 11:19 |
| tpb | Title: ulx3s/orpsoc_top.v at master · daveshah1/ulx3s · GitHub (at github.com) | 11:19 |
| daveshah | in fact this is really the only place that a TRELLIS_IO is needed now that nextpnr does LPF parsing and IO buffer insertion (in some cases tristates can also be converted to a TRELLIS_IO automatically but I wouldn't always rely on it) | 11:20 |
| * cr1901_modern waves to trmm Hey welcome, are you using IRC from one of your vintage machines :3? | 12:13 | |
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| trmm | this is from my modern X1... I haven't brought any retro machines to my new lab yet. | 12:17 |
| cr1901_modern | Ahhh, was kinda half in jest. Idk if you idle on IRC or just use it when absolutely necessary (so maybe you added a vintage touch for novelty). | 12:20 |
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