| *** tpb has joined #yosys | 00:00 | |
| *** zino has quit IRC | 00:59 | |
| *** zino has joined #yosys | 01:00 | |
| *** gsi__ has joined #yosys | 01:32 | |
| *** gsi_ has quit IRC | 01:36 | |
| *** pie__ has quit IRC | 02:55 | |
| *** pie__ has joined #yosys | 02:59 | |
| *** pie__ has quit IRC | 03:05 | |
| *** pie__ has joined #yosys | 03:06 | |
| *** m_w_ has joined #yosys | 03:06 | |
| *** m_w_ has quit IRC | 03:06 | |
| *** m_w_ has joined #yosys | 03:06 | |
| *** m_w_ has quit IRC | 03:10 | |
| *** m_w_ has joined #yosys | 03:10 | |
| MoeIcenowy | sorry to ask icarus verilog question here | 03:20 |
|---|---|---|
| MoeIcenowy | is there a way to access a submodule in the top module without knowing the name of the top module? | 03:21 |
| *** emeb has left #yosys | 03:27 | |
| *** rohitksingh has joined #yosys | 03:28 | |
| *** m_w_ has quit IRC | 03:31 | |
| *** m_w_ has joined #yosys | 03:31 | |
| *** emeb_mac has joined #yosys | 03:32 | |
| *** citypw has joined #yosys | 03:44 | |
| *** rohitksingh has quit IRC | 04:13 | |
| *** danieljabailey has joined #yosys | 04:28 | |
| *** rohitksingh_work has joined #yosys | 04:29 | |
| *** proteusguy has quit IRC | 04:33 | |
| *** s_frit has quit IRC | 04:33 | |
| *** keesj has quit IRC | 04:34 | |
| *** somlo has quit IRC | 04:34 | |
| *** shorne has quit IRC | 04:34 | |
| *** srk has quit IRC | 04:34 | |
| *** dxld has quit IRC | 04:34 | |
| *** mwk has quit IRC | 04:34 | |
| *** kristianpaul has quit IRC | 04:34 | |
| *** loxodes has quit IRC | 04:34 | |
| *** thasti has quit IRC | 04:34 | |
| *** cyrozap has quit IRC | 04:34 | |
| *** pie___ has joined #yosys | 04:50 | |
| *** pie__ has quit IRC | 04:54 | |
| *** s_frit has joined #yosys | 05:01 | |
| *** loxodes has joined #yosys | 05:01 | |
| *** shorne has joined #yosys | 05:01 | |
| *** keesj has joined #yosys | 05:01 | |
| *** somlo has joined #yosys | 05:01 | |
| *** srk has joined #yosys | 05:01 | |
| *** thasti has joined #yosys | 05:01 | |
| *** dxld has joined #yosys | 05:01 | |
| *** mwk has joined #yosys | 05:01 | |
| *** kristianpaul has joined #yosys | 05:01 | |
| *** cyrozap has joined #yosys | 05:01 | |
| *** m_w_ has quit IRC | 05:43 | |
| *** m_w has joined #yosys | 05:43 | |
| *** m_w has quit IRC | 06:29 | |
| *** rohitksingh_work has quit IRC | 06:45 | |
| *** rohitksingh_work has joined #yosys | 06:53 | |
| *** citypw has quit IRC | 07:01 | |
| *** citypw has joined #yosys | 07:15 | |
| *** rohitksingh_work has quit IRC | 07:42 | |
| *** m4ssi has joined #yosys | 07:48 | |
| *** emeb_mac has quit IRC | 08:06 | |
| *** rohitksingh_work has joined #yosys | 08:21 | |
| *** mrsteveman1 has joined #yosys | 08:39 | |
| *** Marex has quit IRC | 09:04 | |
| *** Marex has joined #yosys | 09:30 | |
| *** citypw has quit IRC | 10:15 | |
| *** _whitelogger has quit IRC | 10:19 | |
| *** _whitelogger has joined #yosys | 10:21 | |
| *** SpaceCoaster has joined #yosys | 11:13 | |
| *** leviathanch has joined #yosys | 12:24 | |
| *** sxpert has quit IRC | 12:26 | |
| *** danieljabailey has quit IRC | 12:59 | |
| *** rohitksingh_work has quit IRC | 13:02 | |
| *** Thorn has quit IRC | 13:25 | |
| *** proteusguy has joined #yosys | 13:50 | |
| *** proteusguy has quit IRC | 14:20 | |
| *** rohitksingh has joined #yosys | 14:22 | |
| *** proteusguy has joined #yosys | 14:30 | |
| *** citypw has joined #yosys | 14:34 | |
| *** emeb has joined #yosys | 14:41 | |
| *** proteusguy has quit IRC | 15:02 | |
| *** maikmerten has joined #yosys | 15:34 | |
| *** Forty-3 has quit IRC | 15:51 | |
| *** citypw has quit IRC | 16:33 | |
| *** sxpert has joined #yosys | 16:45 | |
| *** leviathanch has quit IRC | 17:06 | |
| *** m4ssi has quit IRC | 17:17 | |
| *** m_w has joined #yosys | 18:22 | |
| *** gsi__ is now known as gsi_ | 18:52 | |
| *** somlo has quit IRC | 20:14 | |
| *** somlo has joined #yosys | 20:18 | |
| *** m_w has quit IRC | 20:19 | |
| *** rohitksingh has quit IRC | 20:21 | |
| *** AlexDaniel has quit IRC | 20:33 | |
| *** somlo has quit IRC | 20:37 | |
| *** maikmerten has quit IRC | 21:47 | |
| *** m_w has joined #yosys | 21:58 | |
| *** emeb has quit IRC | 22:01 | |
| *** Thorn has joined #yosys | 22:46 | |
| *** emeb_mac has joined #yosys | 23:18 | |
| tnt | Finally took the time to write custom pass for yosys to init BRAM from a file ... https://github.com/YosysHQ/yosys/pull/859 much better than my hacked python script modifying the json between yosys and nextpnr :p | 23:35 |
| tpb | Title: iCE40 BRAM primitives init from file by smunaut · Pull Request #859 · YosysHQ/yosys · GitHub (at github.com) | 23:35 |
| emeb_mac | is there any way to insert BRAM init *after* nextpnr? | 23:38 |
| tnt | Well, there is icebram but that requires the BRAM to be initialized with known random value during synthesis | 23:39 |
| tnt | and then it finds those in the bitstream and replaces them. | 23:39 |
| tnt | (so you synth with a initfile of random value and you save that random.hex, then after nextpnr you can use icebram and give it both random.hex and real.hex and it will find those bram in the bitstream and replace their content). | 23:40 |
| emeb_mac | interesting approach. | 23:41 |
| emeb_mac | sounds like they didn't know where in the bitstream the init data would end up so they had to search for it? | 23:42 |
| emeb_mac | which doesn't make much sense given that the entire toolchain is FOSS at this point. | 23:43 |
| tnt | Well yeah, because (1) it's used also for inferred RAM where you have no idea how the structure of the RAM is vs actual physical BRAM (2) nextpnr doesn't really save any mapping on which 'ram' ends up where. | 23:43 |
| emeb_mac | ok, that makes sense. | 23:44 |
| corecode | tnt: oh you're sylvain! | 23:49 |
| corecode | we met at 35c3 | 23:49 |
| corecode | i asked you about the led panel refresh | 23:49 |
| tnt | I am. and you did ? Well a lot of people asked about it so you'll have to be a bit more precise :p | 23:51 |
| corecode | hah | 23:51 |
| corecode | i was sitting at the table for a couple of days, working on my fpga board (u4k :) | 23:52 |
| tnt | Oh yeah, I remember that ! | 23:52 |
| corecode | hi | 23:52 |
| tnt | You went through quite a bit of trouble to get that board supported :) | 23:55 |
| corecode | yea and it was user error even | 23:55 |
| corecode | turned out to be a bad icecube config - redid it and then the cpu design linked | 23:55 |
| corecode | heh oh well | 23:55 |
| tnt | What are the u4k advantage over the up5k ? | 23:55 |
| corecode | i have them here :) | 23:56 |
| corecode | also, cheaper | 23:56 |
| emeb_mac | heh | 23:56 |
| corecode | i might go use ecp5 for future projects, they seem to be quite cheap as well, especially for what they have | 23:57 |
| tnt | They're a whoile lot trickier to solder though. | 23:57 |
| corecode | i think 0.8mm bga will be fine | 23:58 |
Generated by irclog2html.py 2.13.1 by Marius Gedminas - find it at mg.pov.lt!