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| emeb | tnt: C compiler integrated into my repo -> https://github.com/emeb/icestick_6502 | 00:14 |
|---|---|---|
| tpb | Title: GitHub - emeb/icestick_6502: A small 6502 system build on a Lattice Icestick FPGA development board (at github.com) | 00:14 |
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| emeb_mac | tnt: baby steps - got 6502 w/ cc65 working on a u4k | 06:31 |
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| corecode | \o/ u4k | 09:46 |
| corecode | i wonder how large that design is | 09:47 |
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| tnt | \o/ https://pastebin.com/mTs9MwN7 Ok, so it still has quite a few issues and the sw side is a huge hack but ... | 10:18 |
| tpb | Title: [16389700.930124] usb 1-2: new full-speed USB device number 71 using xhci_hcd [ - Pastebin.com (at pastebin.com) | 10:18 |
| corecode | hi tnt | 10:22 |
| tnt | hi. | 10:23 |
| corecode | i'm debating implementing a HS USB SIE, so that i can skip the silly ftdi chips | 10:24 |
| corecode | but maybe that's too much of NIH | 10:24 |
| tnt | well, for the ice40 I think this would take up way too much space to be relly useful. | 10:25 |
| corecode | yes | 10:25 |
| corecode | although - you think HS would take much more space than FS? | 10:25 |
| tnt | There are some ARM with HS that really don't cost a lot more than they phy. | 10:26 |
| corecode | yea the cheapest i found are the sam3u | 10:26 |
| sorear | Have you looked at valentyusb and the tinyfpga boards? | 10:27 |
| tnt | corecode: we were looking at nuc505dl13y which is 2$ | 10:28 |
| tnt | sorear: what's your point ? | 10:29 |
| corecode | who sells the nuc? | 10:30 |
| sorear | tnt: tinyfpga did exactly what corecode is asking about -bitbang USB (forget which speed) on ice40 to avoid the footprint of a separate ftdi | 10:30 |
| tnt | sorear: no, he's talking about HS ... 480mbps, you need a phy. | 10:30 |
| tnt | corecode: nuovoton directly. | 10:31 |
| tnt | https://direct.nuvoton.com/en/nuc505dl13y | 10:31 |
| corecode | good, they had some availability issues | 10:31 |
| corecode | uh wow that is a nice chip at that price | 10:32 |
| corecode | ah, embedded spi flash, interesting | 10:32 |
| corecode | thanks, that's a good lead | 10:33 |
| corecode | how did you find them? | 10:33 |
| tnt | https://github.com/icebreaker-fpga/icebreaker/issues/14 :) | 10:34 |
| tpb | Title: Explore options for FTDI replacement · Issue #14 · icebreaker-fpga/icebreaker · GitHub (at github.com) | 10:34 |
| corecode | ah, samg as well | 10:37 |
| corecode | ah no | 10:37 |
| corecode | classic usb confusion | 10:37 |
| corecode | tnt: thanks, that's a great find | 10:48 |
| corecode | now the question is, can it do a fast bidirectional bus | 10:49 |
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| corecode | i've used nuvoton chips some years ago | 10:50 |
| corecode | took me a while to get the usb peripheral going back then | 10:50 |
| corecode | hm, doesn't look like there is any kind of bus mode | 10:53 |
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| tnt | corecode: SD Host is probably the best it can do. | 12:33 |
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| corecode | tnt: seems like a roundabout way to transmit data. what do you think? | 14:31 |
| tnt | corecode: well it's not ideal, but that's probably the highest bandwidt peripheral on there. | 14:32 |
| tnt | It's basically a quad SPI port. | 14:32 |
| corecode | and i guess DDR | 14:33 |
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| shapr | Does this mean vmware/cascade would work better on a BeagleWire? https://github.com/vmware/cascade/issues/83#issuecomment-469389807 | 17:26 |
| tpb | Title: support for yosys backend? (or fill out "adding new backends" docs section?) · Issue #83 · vmware/cascade · GitHub (at github.com) | 17:26 |
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| emeb | tnt: here's the 6502 project ported to a up5k -> https://github.com/emeb/up5k_6502 | 20:22 |
| tpb | Title: GitHub - emeb/up5k_6502: A simple 6502 system built on a Lattice Ultra Plus 5k FPGA (at github.com) | 20:22 |
| emeb | I tweaked it slightly to use one of the SPRAM cores for the main system memory, so the 6502 has 32kB RAM and 4kB ROM in this build. | 20:23 |
| tnt | emeb: nice ! I'll try to give this a shot next week end :) | 20:25 |
| tnt | emeb: what target board did you use btw ? | 20:25 |
| emeb | tnt: I built it on a upduino I had laying around. | 20:26 |
| emeb | and I used my custom-made USB->SPI board to directly load the up5k so you'll definitely need to tweak the "make prog" target for whatever programming hardware you have. | 20:27 |
| tnt | I'll probably try on the icebreaker and use iceprog. | 20:28 |
| emeb | tnt: great - I was hoping someone would try it on that. I don't have one so I can't do it myself. | 20:28 |
| emeb | does icebreaker have a USB serial port hooked up to the FPGA? | 20:29 |
| tnt | yes it does. | 20:33 |
| tnt | the same ftdi that's used for programming has a 2nd interface configured as uart. | 20:34 |
| emeb | nice. so pretty much all you need to do is rearrange the pin assignments in the .pcf file to match the icebreaker I/O. | 20:34 |
| emeb | and revise the 'prog' target in the makefile. | 20:34 |
| tnt | I might try it tonigh. Depends how long it takes me to cleanup the microcode from my usb core :) | 20:39 |
| emeb | cool - let me know if you run into any snags I could help with. | 20:58 |
| tnt | Is there a demo app btw ? (didn't look really deep yet) | 21:06 |
| tnt | how is it loaded in spram ? | 21:06 |
| emeb | There is demo code but it's preloaded into a ROM that's implemented w/ EBR. | 21:25 |
| corecode | how big is the cpu design? | 21:26 |
| emeb | you mean how much of the FPGA does the whole thing use? | 21:26 |
| emeb | here's the nextprn resource table: https://pastebin.com/eVVZnwnP | 21:28 |
| tpb | Title: Info: Device utilisation: Info: ICESTORM_LC: 1043/ 5280 19% Info - Pastebin.com (at pastebin.com) | 21:28 |
| corecode | nice | 21:31 |
| emeb | plenty of logic left over | 21:31 |
| corecode | makes me feel like my cpu design isn't too bad | 21:32 |
| emeb | yours is smaller? | 21:32 |
| corecode | yes, around 600 | 21:32 |
| corecode | and it is a 16 bit cpu | 21:32 |
| emeb | kewl | 21:33 |
| tnt | corecode: nice, that's about the size of my 16b cpu as well. Hard to go smaller. | 21:37 |
| corecode | yea, the alu mux makes it quite big | 21:39 |
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| emeb | hmmm... something weird going on with the ACIA. Works OK for TX but reading RX data isn't clearing the IRQ as it did in my other designs. grmbl. | 22:06 |
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| emeb | fixed & pushed | 22:28 |
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