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mithro | futarisIRCcloud: I've yet to figure out if there is a good way to use cocotb with migen | 00:16 |
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futarisIRCcloud | mithro: Yeah, I saw you wrote about it ~3 years ago. https://logs.timvideos.us/%23timvideos/%23timvideos.2016-04-01.log.html ... | 01:02 |
mithro | :-P | 01:02 |
xobs | futarisIRCcloud: reading is working, and writing is working too, but the writing state machine gets into a funny position and ends up corrupting the next packet. | 01:48 |
xobs | Today is a holiday, but I still want to work on this and get that fixed. | 01:48 |
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futarisIRCcloud | I know that feeling... Being able to use the bridge will make the fomu a whole lot more useful. | 02:04 |
xobs | How? "ICESTORM_LC: 5232/ 5280 99%" routes and passes timing. | 05:04 |
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xobs | It works, so now I'll add bridge support to litex. That'll be the last piece before we can have debugging support with gdb. | 05:35 |
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keesj | hi | 06:22 |
tnt | xobs: I'm still not entirely clear what that bridge is or what the use is ? | 06:28 |
xobs | tnt: the bridge exposes the entire Wishbone bus to the host. | 06:30 |
xobs | Happily, the cpu has a debug port on the Wishbone bus, so with the briidge we can hook up gdb. | 06:31 |
xobs | You can also develop drivers on your host system by doing #include "generated/csr.h" and replacing the read() and write() macros with one that does a bridge call. | 06:40 |
keesj | the tutorial here might be nice https://github.com/enjoy-digital/fpga_101/blob/master/lab003/base.py#L167 creates a SPIMaster on the wishbone . after building /flashing it is possible to write a pyhon script(uart->wishbone bridge) to implement a device specific spi protocol https://github.com/enjoy-digital/fpga_101/blob/master/lab003/test/test_adxl362.py | 07:19 |
tpb | Title: fpga_101/base.py at master · enjoy-digital/fpga_101 · GitHub (at github.com) | 07:19 |
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tnt | xobs: ok, I see. | 08:33 |
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futarisIRCcloud | xobs: I might just end up using it on arty with pmod-usb-raw if we run out of space. | 10:26 |
futarisIRCcloud | https://github.com/TomKeddie/prj-pmod/tree/master/hardware/pmod-usb-raw | 10:26 |
tpb | Title: prj-pmod/hardware/pmod-usb-raw at master · TomKeddie/prj-pmod · GitHub (at github.com) | 10:26 |
futarisIRCcloud | https://oshpark.com/shared_projects/UDlBSFXa | 10:26 |
tpb | Title: OSH Park ~ (at oshpark.com) | 10:26 |
futarisIRCcloud | https://github.com/tinyfpga/TinyFPGA-Bootloader/issues/2 | 10:27 |
tpb | Title: Port to Xilinx Series-7 (such as the Artix) FPGAs · Issue #2 · tinyfpga/TinyFPGA-Bootloader · GitHub (at github.com) | 10:27 |
xobs | futarisIRCcloud: cool! always looking for more people to test. | 11:05 |
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