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ske33 | hi, can I check for prjxray, in ../prjxray/settings/artix7_50t.sh; | 02:51 |
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ske33 | For artix7_50t.sh, | 02:53 |
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ske33 | Hi, for Artix7_50t.sh, | 03:11 |
ske33 | 1. What is the relation between XRAY_ROI_GRID_X1/X2 with respect to XRAY_ROI_TILEGRID? | 03:11 |
ske33 | Similarly what is the relation for XRAY_ROI_GRID_Y1/Y2 with respect to XRAY_ROI_TILEGRID? | 03:11 |
ske33 | example, in the script: | 03:11 |
ske33 | XRAY_ROI_TILEGRID="SLICE_X0Y0:SLICE_X65Y99 SLICE_X0Y100:SLICE_X57Y149 ..." | 03:11 |
ske33 | How do we set XRAY_ROI_GRID_X1/X2 and XRAY_ROI_GRID_Y1/Y2? | 03:11 |
ske33 | 2. What is the relation between XRAY_ROI_TILEGRID and XRAY_ROI? | 03:11 |
ske33 | example, in the script: | 03:11 |
ske33 | XRAY_ROI_TILEGRID="SLICE_X0Y0:SLICE_X65Y99 SLICE_X0Y100:SLICE_X57Y149 ..." | 03:11 |
ske33 | XRAY_ROI="SLICE_X0Y100:SLICE_X35Y149 ..." | 03:11 |
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sf-slack | <timo.callahan> @mholenko I found the PR for I2S : https://github.com/enjoy-digital/litex/pull/516 -- I saw the reference to "SoundSoC" which I'd guess is a LiteX target, which was taken out of the branch before merging. Did that end up on some other branch or commit that is accessible? Thanks! | 14:29 |
tpb | Title: Add I2S support to Arty by mateusz-holenko · Pull Request #516 · enjoy-digital/litex · GitHub (at github.com) | 14:29 |
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sf-slack | <mholenko> @timo.callahan it's available in https://github.com/litex-hub/zephyr-on-litex-vexriscv | 14:32 |
tpb | Title: GitHub - litex-hub/zephyr-on-litex-vexriscv (at github.com) | 14:32 |
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sf-slack | <timo.callahan> @mholenko Thanks! | 14:43 |
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-_whitenotifier-b- [fpga-tool-perf] acomodi opened issue #214: Update all VPR tests to use XDC placement constraints - https://git.io/JJyKs | 17:02 | |
-_whitenotifier-b- [fpga-tool-perf] acomodi opened issue #215: Transition to use an automated circuit/toolhain matrix generation - https://git.io/JJyKW | 17:05 | |
sf-slack | <cwl11> Hi, I just have a question about the bitstream. When logic tile LUTs get configured, does the largest possible input get shifted to the MSB of the INIT value? | 17:06 |
-_whitenotifier-b- [fpga-tool-perf] acomodi opened issue #216: Add more metrics to the meta.json results files - https://git.io/JJyK0 | 17:08 | |
-_whitenotifier-b- [prjuray] mithro opened issue #26: Add / document support for the ZCU10[45] dev boards - https://git.io/JJyir | 17:51 | |
-_whitenotifier-b- [prjuray] mithro opened issue #27: Add and document support for KCU105 - https://git.io/JJyi1 | 17:53 | |
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litghost | cwl11: LUT.INIT[{A6,A5,A4,A3,A2,A1}] = O6 | 18:38 |
litghost | cwl11: Does that make sense to you? | 18:38 |
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