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hedgeberg | o/ | 07:36 |
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hedgeberg | hello! JDM told me this would be a good place to connect with the dev team about contributing | 07:37 |
sorear | hi! | 07:39 |
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hedgeberg | yeah this is a much lower-density channel than #yosys | 07:54 |
mithro | hedgeberg: Yes! | 08:06 |
mithro | hedgeberg: About to head into a meeting but will be around a bit later if you have questions | 08:08 |
hedgeberg | i mean im not working on this rn, but ill let you know when im starting my first to-do task mithro | 08:12 |
hedgeberg | and, thanks! | 08:12 |
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mithro | The DRAM tests can be found at https://github.com/SymbiFlow/symbiflow-arch-defs/tree/master/artix7/tests/dram -- as far as I know they all work. litghost was going to move onto the BRAM tests which would be in https://github.com/SymbiFlow/symbiflow-arch-defs/tree/master/artix7/tests/bram -- would be good to verify that someone else can get the DRAM tests running too | 11:55 |
tpb | Title: symbiflow-arch-defs/artix7/tests/dram at master · SymbiFlow/symbiflow-arch-defs · GitHub (at github.com) | 11:55 |
sorear | I'm annoyed that we're using "DRAM" for two unrelated things in FPGA documentation | 11:57 |
mithro | tmichalak: ^ | 11:57 |
mithro | sorear: Distributed RAM verse external DDR RAM? | 11:58 |
sorear | wish we could reserve DRAM for efforts to document the ecp5 DQSDLL blocks and whatever Xilinx has, and come up with a different term like Async RAM or LUT RAM for that thing | 11:58 |
sorear | probably too late | 11:58 |
sorear | maybe DisRAM | 11:59 |
sorear | yes, distributed RAM versus external DDRx RAM | 11:59 |
mithro | tmichalak: To generate images -> do cd ~/github/SymbiFlow/symbiflow-arch-defs/build/artix7/primitives/slicel then type "make <tab>" | 11:59 |
daveshah | I don't think anyone ever uses DRAM for DQS primitives etc? | 11:59 |
mithro | tmichalak: You'll get something like "make file__home_tansell_github_SymbiFlow_symbiflow-arch-defs_artix7_primitives_slicel_slicel.bb.svg" | 12:00 |
daveshah | If nothing else that SDRAM doesn't need them | 12:00 |
mithro | sorear: I almost always say DDR RAM | 12:00 |
daveshah | What would be confusing is an FPGA with built in DRAM | 12:00 |
mithro | daveshah: inbuilt DDR RAM? :-P | 12:00 |
daveshah | ie the Anlogic parts with die stack SDRAM | 12:01 |
mithro | daveshah: The two ram types in iCE40UP5K is alway confusing :-P | 12:01 |
daveshah | Pretty sure I've seen a FPGA with DDR2 in package | 12:02 |
sorear | xilinx and altera have talked a lot about HBM/HMC for high end parts but idk if anything ever shipped | 12:03 |
sorear | but re. DRAM I'm thinking more litedram and the overwhelming external computer industry context | 12:03 |
daveshah | EG4D20 has 128Mb DDR in package | 12:07 |
daveshah | https://datasheet.lcsc.com/szlcsc/An-Road-Shanghai-Info-Tech-EG4D20EG176_C134201.pdf | 12:07 |
sorear | now we just need one with eDRAM | 12:08 |
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daveshah | That would be fun | 12:16 |
daveshah | I wonder if we will ever see commercial FPGAs with dynamic config memory? | 12:16 |
daveshah | http://isca2016.eecs.umich.edu/wp-content/uploads/2016/07/8A-1.pdf | 12:18 |
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sorear | it seems like a better fit for gain cells (2T/3T using "parasitic" gate capacitance of a dedicated read transistor) than traditional 1T1C DRAM | 12:24 |
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mithro | tmichalak: You want to add this alias to your ~/.bash_aliases or ~/.bash_rc | 13:08 |
mithro | alias cdb='cd $(pwd | sed -e"s,$(git rev-parse --show-toplevel),$(git rev-parse --show-toplevel)/build," -e"s,build/build,,")' | 13:08 |
mithro | lets you quickly switch between the build and non-build at the same directory level | 13:09 |
mithro | tmichalak: So it looks like the stuff in the dram directory just tests to check that VPR can place and route those primitives | 13:11 |
mithro | tmichalak: The actual place which creates something which runs on the device is https://github.com/SymbiFlow/symbiflow-arch-defs/blob/master/artix7/tests/ram_test/ram_test.v it seems | 13:12 |
tpb | Title: symbiflow-arch-defs/ram_test.v at master · SymbiFlow/symbiflow-arch-defs · GitHub (at github.com) | 13:12 |
mithro | tmichalak: See the top module here -> https://github.com/SymbiFlow/symbiflow-arch-defs/blob/master/artix7/tests/ram_test/top.v | 13:12 |
tpb | Title: symbiflow-arch-defs/top.v at master · SymbiFlow/symbiflow-arch-defs · GitHub (at github.com) | 13:12 |
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mithro | tmichalak: https://symbiflow-arch-defs.readthedocs.io/en/latest/ | 14:23 |
tpb | Title: SymbiFlow Architecture Definitions symbiflow-arch-defs 0.1 documentation (at symbiflow-arch-defs.readthedocs.io) | 14:23 |
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mithro | mgielda: https://symbiflow-arch-defs.readthedocs.io/en/latest/ | 14:24 |
tpb | Title: SymbiFlow Architecture Definitions symbiflow-arch-defs 0.1 documentation (at symbiflow-arch-defs.readthedocs.io) | 14:24 |
mithro | mgielda / tmichalak: https://docs.google.com/drawings/d/1GwzV6Rs0gbiGI4DznWwG4000BLOcsuYYgYQ0YDqgXHY/edit | 14:54 |
tpb | Title: SymbiFlow Architecture Definitions - File Diagram - Google Drawings (at docs.google.com) | 14:54 |
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mithro | mgielda: Is that helping? | 15:06 |
mgielda | yup, thx | 15:10 |
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kgugala | hi | 15:11 |
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sorear | hi? | 15:20 |
mithro | mgielda: https://docs.verilogtorouting.org/en/latest/arch/reference/#pb-type | 15:37 |
mithro | Hi kgugala! | 15:37 |
mithro | mgielda: Take a look at https://github.com/SymbiFlow/vtr-verilog-to-routing/blob/master%2Bwip/vpr/src/base/atom_netlist.h and https://github.com/SymbiFlow/vtr-verilog-to-routing/blob/master%2Bwip/vpr/src/base/clustered_netlist.h | 15:39 |
tpb | Title: vtr-verilog-to-routing/atom_netlist.h at master+wip · SymbiFlow/vtr-verilog-to-routing · GitHub (at github.com) | 15:39 |
mithro | mgielda: It has pretty nice documentation in those files which turns up *nowhere* when you search for it | 15:39 |
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mithro | Now _thats_ a diagram -> https://docs.google.com/drawings/d/1GwzV6Rs0gbiGI4DznWwG4000BLOcsuYYgYQ0YDqgXHY/view | 17:04 |
tpb | Title: SymbiFlow Architecture Definitions - File Diagram - Google Drawings (at docs.google.com) | 17:04 |
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