Thursday, 2021-05-06

*** tpb has joined #litex00:00
*** Degi has quit IRC00:09
*** Degi has joined #litex00:10
*** TMM has quit IRC00:17
*** TMM has joined #litex00:17
*** mntmn has quit IRC01:17
*** mntmn has joined #litex01:18
*** trabucay1e has joined #litex01:47
*** captain_morgan has quit IRC01:52
*** kbeckmann has quit IRC01:52
*** trabucayre has quit IRC01:52
*** captain_morgan has joined #litex01:53
*** kbeckmann has joined #litex01:53
*** rom has joined #litex02:42
*** Bertl is now known as Bertl_zZ03:06
*** rom has quit IRC03:28
*** kgugala_ has joined #litex04:17
*** kgugala__ has joined #litex04:20
*** kgugala has quit IRC04:20
*** kgugala_ has quit IRC04:21
*** jk1 has joined #litex04:43
*** jk1 has quit IRC04:46
*** kgugala has joined #litex04:50
*** trabucay1e is now known as trabucayre04:52
*** kgugala__ has quit IRC04:53
*** cr1901_modern has quit IRC05:32
*** kgugala_ has joined #litex06:10
*** kgugala has quit IRC06:14
*** pftbest has joined #litex06:45
*** cr1901_modern has joined #litex07:44
Melkhior@gsomlo Darn, wanted to try the new sdcard w/ interrupt, but some recent Linux changes in Kconfig broke the kconfiglib.py used by Yocto :-(08:27
MelkhiorIs there some way to use an older kernel version with the Litex stuff on litex-rebase ?08:27
MelkhiorI probably shoud bite the bullet and figure out to generate a working kernel on my own (w/o buildroot or yocto)08:27
Quarky93[m]_florent_: sorry to bother again, were you able to get HBM running? I'm not very familiar with LiteX but perhaps I could help with it.09:13
_florent_Quarky93[m]: Sorry not yet, but I'm going to do it now, otherwise I'll never do it... :) I'll at least update the repository to have the updated version of the code09:33
Melkhior@gsomlo @_florent_ switched to the interrupt-based version of sdcard (turns out compiling the kernel was easy)09:40
MelkhiorBut boot is not reliable; often I get a lot of 'cmd 2' failed09:40
Melkhiorvery cold boot seems fine, but my PS/2 controllers (got 2 instance now, preparing for mouse) don't seem to like very cold boot09:41
Melkhiorreset/reboot are mostly not working, "cmd 2 failed" :-(09:41
Melkhiorshort power-cycle doesn't help, long power-cycle seems needed ?!?09:41
_florent_Melkhior: when you say the boot is not reliable, it's the boot from the BIOS or the Linux boot?09:43
MelkhiorLinux09:43
Melkhior_florent_ BIOS is always fine09:43
Melkhiorroot on the mmcblk0p209:44
_florent_ok, I've not tested it yet personnaly09:44
Melkhiorit may be that I have more source of interrupts than most and they are routed to core 0 at boot:09:45
Melkhior(dolbeau)buildroot:~> cat /proc/interrupts09:45
Melkhior           CPU0       CPU1       CPU2       CPU309:45
Melkhior  2:       1636          0          0          0  SiFive PLIC   2  eth009:45
Melkhior  3:       2343          0          0          0  SiFive PLIC   5  litex-mmc09:45
Melkhior  4:          5          0          0          0  SiFive PLIC   3  f0004800.ps2kbd09:45
Melkhior  5:      20807      21165      21262      21091  RISC-V INTC   5  riscv-timer09:45
Melkhior  6:          0          0          0          0  SiFive PLIC   4  f0005000.ps2mou09:45
MelkhiorIPI0:        41         44         52         21  Rescheduling interrupts09:45
MelkhiorIPI1:       839       1063       1863        793  Function call interrupts09:45
MelkhiorIPI2:         0          0          0          0  CPU stop interrupts09:45
MelkhiorIPI3:         0          0          0          0  IRQ work interrupts09:45
Melkhior(not mouse so no interrupts)09:45
_florent_is there an easy way to switch between polling and interrupt mode for the SDCard in the .dts?09:45
_florent_If so, do you see the difference by only changing this?09:45
Melkhior@_florent_ good question ; @somlo ?09:45
Melkhiordidn't try yet09:45
Melkhiorwill do if it can be fixed from the cmdline in the DTS09:46
_florent_it seems shorne added the possibility when enabling the IRQ: https://github.com/enjoy-digital/litex/pull/901/files#diff-6bac543d87df6681b46e337de366d43284e9d06de14e43108fe407fb29c4c69fR29909:47
_florent_so maybe you could try to just  disable the SDCard interrupts in the .dts and see if it's behaving as before, if this, this could be related to changes in the linux driver09:49
MelkhiorI'm running latest (as of early this morning) litex & linux/litex-rebase09:50
Melkhiorwill try the DTS change when I can09:50
Melkhiormeanwhile it has booted with sd & kbd, sdcard seems to work fine once properly initialiazed09:50
MelkhiorBTW, irqbalance succeeds (with a proper script) to move the IRQ to other cores:10:13
Melkhiorroot)buildroot:~# cat /proc/interrupts10:13
Melkhior           CPU0       CPU1       CPU2       CPU310:13
Melkhior  2:      33652          0       5254          0  SiFive PLIC   2  eth010:13
Melkhior  3:       3110        447          0          0  SiFive PLIC   5  litex-mmc10:13
Melkhior  4:        113          0          0         15  SiFive PLIC   3  f0004800.ps2kbd10:13
somloMelkhior: I think if you just comment out any "interrupt[-parent]" lines in the mmc0 node, the linux driver will default to polling10:45
Melkhior@somlo OK will try that10:46
MelkhiorMeanwhile once booted, not issue10:46
Melkhiorrecompiling Tk at -j4 from the sdcard :-)10:46
Melkhiorwhat's 'cmd 2' ? any reason why it should fail after a reset ? (updated everything at once so it may not be the interrupt that is the issue...)10:47
somlo"all_send_cid" -- part of initialization10:49
somloI typically get those when timing is a problem. Halving the sdclock usually makes them go away for me, and it's only still a problem on ecp5 with yosys/trellis/nextpnr, pretty solid on xilinx10:50
Melkhior@somlo mmm weird then, it was reliable before and I was running at 25 MHz, Artix-7 speed grade -2 & using vivado, so probably best case timing-wise10:52
Melkhior(and no negative slack at all)10:52
Melkhiorwill report when I have the time to test disabling interrupt10:53
Melkhiorrunning at 25 MHz in Linux as well, no issue - it's purely a will boot/won't boot issue it seems10:54
*** proteusguy has quit IRC11:10
*** Bertl_zZ is now known as Bertl11:11
zyp_florent_, is there a reason all the examples in litex-boards that includes spi flash is using mode="1x"?11:42
_florent_zyp: IIRC it's only because I haven't spent the time to make it work in 4x on Fomu/Icebreaker11:45
zypI just tried adding it to ecpix5, but both 1x and 4x modes are behaving weird, so I guess I should figure out how this is supposed to work first :)11:50
_florent_zyp: it should not be too complicated, but you need to instantiate the clock primitive and use the right dummy cycles value12:08
zypall the examples used 8 for the dummy cycles -- after I increased it to 9 the 1x mode now looks reasonable12:09
zypwould it be the same number for 4x mode?12:09
_florent_The dummy cycles are related to the mode12:45
_florent_With a contents you know in the flash + BIOS's mem_read, you should be able to find the right value, looking at https://github.com/litex-hub/linux-on-litex-vexriscv/issues/15 could eventually be useful12:47
zypin my case the flash is empty and all bytes reads cc in 4x mode13:07
*** proteusguy has joined #litex14:39
Melkhior@_florent_ somlo Seems I have no issue booting (cold or reset) without the interrupt for the sdcard in the DTS14:58
Melkhiorgeertu Do you know why Linux sees the cores as 'threads' rather than 'cores' ?15:03
MelkhiorThread(s) per core:  415:03
MelkhiorCore(s) per socket:  115:03
Melkhiord-tlb-size = <8>;15:03
Melkhiord-tlb-sets = <8>;15:03
Melkhiori-tlb-size = <4>;15:03
Melkhiori-tlb-sets = <4>;15:03
Melkhioroups; first two lines are from lscpu15:03
MelkhiorI've added in the DTS the specifier (above) for the TLB/MMU in each coreas it seemed to be a factor in the specifications, but Linux still says they are threads rather than cores15:04
Melkhiorpurely cosmetic issue of course, but still :-)15:04
Melkhior(I *think* some parameters I added in the VexRiscv cluster controls the TLB size/sets, hence the 8 for d-tlb, but I don't know if I can/how to measure the number of TLB reloads)15:08
Melkhiormmm seems this requires a 'cpu-map' node on Arm & RISC-V, it's not defined in the cpus/cpu nodes15:34
*** lkcl has quit IRC15:36
*** lkcl has joined #litex15:38
*** lkcl has quit IRC15:43
*** lkcl- has joined #litex15:44
*** lkcl has joined #litex15:44
*** lkcl has quit IRC15:55
*** lkcl- is now known as lkcl15:55
_florent_Quarky93[m]: This is finally done :) https://twitter.com/enjoy_digital/status/139033628117611724916:05
gatecat_florent_: congrats that's awesome!16:06
Quarky93[m]<_florent_ "Quarky93: This is finally done :"> Yay! thanks a lot 🙏16:06
_florent_I had to make some changes in LiteX to get it working since the HBM2 controller is adding debug probes on the JTAG chain 1,  so I had to switch JTAG Bone to chain 216:07
_florent_so you need to pull both LiteX (now allow selecting the JTAG chain for JTAGBone) and fk33_hbm2 repo16:07
Quarky93[m]ah ok cool16:08
Quarky93[m]Now to use this in the lamest way possible. as a giant fifo >.>16:08
_florent_In the design, I connected 4 AXI ports to the CPU, just to verify interconnection with the CPU, but this is not very efficient: 32-bit Wishbone --> 32-bit AXI-Lite --> 256-bit AXI-Lite --> AXI --> HBM16:09
_florent_When using the AXI ports directly with your logic and bursts, you should be able to get > 50Gbps per port with the current clocking (250MHz), but IIRC this can be increased to 450MHz16:11
_florent_A giant/fast FIFO is indeed a very nice use-case for this :)16:11
Quarky93[m]yep that's ok, I don't need too much bandwidth to the CPU. For my design CPU will only take one port, the rest will be spread across accelerators 🙂16:12
_florent_OK i see, thanks for pushing me a bit on this :) Interconnecting the AXI ports with your logic should not be too complicated even if you are not familiar with Migen/LiteX, but feel free to ask if you need help or provide feedback16:14
Quarky93[m]<_florent_ "OK i see, thanks for pushing me "> I will thanks! Basically I'm trying to have a PCIE endpoint whereby the host can load some initial data to HBM, then the RISCV will take it from there and orchestrate the accelerators to do stuff. RISCV will also attach to the ICAP to do dynamic reconfig to load different accelerators, thus the need for a giant FIFO to hide the latency :P16:23
Quarky93[m]It's nice that LiteX has almost all the infrastructure I need already, while being open source (apart from the xilinx IP)!16:24
_florent_Quarky93[m]: ok interesting, LitePCIe has also been validated on this board, so you can look at the LiteX-Boards support: https://github.com/litex-hub/litex-boards/blob/master/litex_boards/targets/sqrl_fk33.py16:26
_florent_Or also the LitePCIe example: https://github.com/enjoy-digital/litepcie/blob/master/examples/fk33.py16:26
Quarky93[m]<_florent_ "Quarky93: ok interesting, LitePC"> Yep, that's what initially got me interested in LiteX :D16:26
_florent_Now that we have all the interesting pieces, I'm indeed thinking about doing a project specific for accelerators where we could start with the Acorn CLE 215 to learn or low cost alternative and also support the BCU1525/FK3316:28
Quarky93[m]I wonder if the Acorn would be good for a compression/decompression algo16:31
_florent_I started prototyping something a year ago:16:33
_florent_https://usercontent.irccloud-cdn.com/file/x3OOPuQ5/image.png16:33
_florent_https://usercontent.irccloud-cdn.com/file/5WMv6Iwy/image.png16:33
Quarky93[m]it would be cool to be able to put it in your laptop (maybe with a heat sink bridge to the main heat sink)16:33
_florent_but some pieces were still missing or not very stable, now that we have almost everything thing (DDR4, PCIe, HBM2), it would make sense to spend some time on it16:35
Melkhiorenough pins on those boards to get some hdmi out ? they look like they could be a good testbed for an open-source GPU if one ever gets complete enough...16:35
Quarky93[m]<_florent_ "https://usercontent.irccloud-cdn"> I think this would really revolutionise hobbyist FPGA accelerators16:35
_florent_Quarky93[m]: the idea for the project is to rely on the core generators that are already present on LitePCIe, LiteDRAM, etc..16:36
Melkhiorand GPUs are the original use case for HBM16:37
_florent_so you just create a configuration for each interface, generate the cores, and they would then be integrated along with the acceleration logic16:37
_florent_Melkhior: enough Pins on the FK33 our Acorn?16:38
_florent_our/or16:38
Quarky93[m]Unfortunately the FK33 does not have HDMI out. But the Jungle Cat modules can be mounted on a PCIE card with HDMI 2.016:38
Melkhior@_florent_ any of them, really...16:38
_florent_The Acorn should have enough IOs16:40
Melkhioror even the VCU12816:40
_florent_but it would also be possible to just use the GTP from the PCIe connector for the 3 HDMI lanes + Clock :)16:40
_florent_this would work on the Acorn and FK33, and would even allow UHD/4K...16:41
_florent_this would just requires a small PCIe <--> HDMI adapter16:41
_florent_Melkhior: I was playing with this yesterday: https://twitter.com/enjoy_digital/status/138999967071860326416:42
Quarky93[m]would also be cool to support the new Xilinx Kira SOMs16:43
_florent_The BlackMagic boards could also be good candidate (but it's "only" a XC7A100T, Acorn has a XC7A200T)16:43
Melkhior@_florent_ nice toy; but is there enough memory banwidth to support a framebuffer in front of the hdmi ?16:44
Quarky93[m]Zynq Ultrascale + 100K LUTs + URAM + a hardened h264/h265 encoder/decoder16:44
Quarky93[m]and 4GB of DDR416:44
_florent_@Melkhior There is a 32-bit DDR3 which should gives around 20Gbps bandwidth with LiteDRAM16:45
_florent_the Acorn only has a 16-bit DDR3, so will be around 10Gbps16:45
_florent_Quarky93[m]:Kira SOMs indeed seems very interesting, but LiteX is less interesting than for regular FPGAs since most of the peripherals seem to be connected to the PS16:47
Quarky93[m]ahh right yea the RAM is on the PS side, as is the ethernet16:48
MelkhiorA fullhd framebuffer at 60 Hz needs ~500 MB/s so 20Gbps should be fine16:48
Melkhior@_florent_ I'm guessing you connect the UART to the PCIe connector ? I don't see much external interface other than the PCIe and HDMI16:51
Melkhior(on the Mini 4K I meanà16:52
Melkhior)16:52
Melkhior... or jtag16:52
Melkhioris there jtag available on such a production board ?16:53
_florent_Melkhior: The UART is done over JTAG yes and the JTAG pinout is printed on the silkscreen... :)16:55
Melkhiorouch, you need soldering ? too bad:-(  (I'm terrible at it)16:56
*** pftbest has quit IRC16:58
*** pftbest has joined #litex16:58
_florent_The soldering is really easy17:00
_florent_Melkhior: In fact, it's possible to load a LiteX bitstream without any soldering or JTAG (just over PCIe with the default BlackMagic bistream + then with LitePCIe) but it's less convenient17:07
Melkhior@_florent_ but I'm guessing if you screw up the bitstream you need JTAG as a fallback ? And 'really easy' - terrible eyesight getting worse with age & and I was already bad at it when I was young and had two working eyes:-/  so I've given up trying17:13
MelkhiorSeeedstudio PCBA & similar are a blessing, they do it all for me :-)17:13
_florent_Melkhior: Here it's only a matter of taking 2 x 5 pin row headers and soldering them on the PCB :)17:14
_florent_But this board was interesting for me since I also run some SDI designs on it, but it's maybe less interesting for others17:16
Melkhior@_florent_ how much memory does it have ?17:19
MelkhiorThe Wukong is nice as it's dirt-cheap, has hdmi/ethernet/sdcard onboard, so for a 'pc-like' litex soc it's great17:19
Melkhiorbut it only has 256 MiB :-(17:19
MelkhiorAnd I've yet to dare hijack the VCU128 from the office to try LiteX on;-)17:20
MelkhiorSpeaking of 'pc-like' - X11 now running on fbdev, trying to borrow a PS/2 mouse as keyboard-only X11 isn't great :-)17:21
_florent_This one has 512MB17:27
_florent_the Acorn has 1GB17:27
Melkhiortempting :-)17:29
Melkhiorthw17:30
Melkhiorthx17:30
*** HoloIRCUser has joined #litex17:30
_florent_I have plenty of Acorn CLE 215 that I bought to create projects with LiteX and share with other developers, happy to just sent you one if you want to play with it (and also to anyone contributing or willing to contribute to the project)17:32
Melkhior@_florent_ Thanks I'd love that ; but as i said - terrible at soldering:-)  if there's some work needed to get peripherals (storage, network, ...) connected, you may want to favor someone more competent...17:34
MelkhiorI remember seeing some sort of breakout board for it, but I don't remember if it was from you?17:36
Melkhiorno, someone else: https://spoolqueue.com/new-design/fpga/migen/litex/2020/08/11/acorn-cle-215.html17:37
tpbTitle: Running Linux on the Acorn CLE-215+ | The Spool Queue (at spoolqueue.com)17:37
_florent_on my side I was just using a PCIe riser for the power and to expose a GTP for the SATA17:38
MelkhiorSATA is even better than sd-card :-)17:38
zyp_florent_, is the SpiFlashDualQuad core known to be working?18:14
nickoe_florent_: https://kicad-downloads.s3.cern.ch/index.html?prefix=osx/nightly/18:18
tpbTitle: KiCad Downloads (at kicad-downloads.s3.cern.ch)18:18
nickoewoops18:18
nickoeI mean, _florent_ Is there a way to re-use the litex_server --jtag ... instance with the --load option?18:18
*** TMM has quit IRC18:27
*** TMM has joined #litex18:27
_florent_zyp: yes is has been used on several designs, but mostly on 7-series I think19:14
zypI've been probing the signals, so far everything looks fine but the flash is not responding and I don't understand why yet19:15
_florent_zyp: There is also LiteSPI (see arty target for an example), that is able to automatically calibrate the dummy cycles19:15
_florent_but the read latency seems higher with LiteSPI (It was a lot slower when doing XIP IIRC)19:16
zypah, I'll take a look at that later19:17
_florent_nickoe: it's not possible to load the bistream and use litex_server --jtag simultaneously no19:17
_florent_at least not as currently implemented19:18
nickoe_florent_: ok :/19:18
nickoeI was just hoping I overlooked something19:19
nickoe:D19:19
*** kgugala has joined #litex19:25
*** kgugala_ has quit IRC19:25
*** Bertl is now known as Bertl_oO19:28
*** kgugala_ has joined #litex19:32
*** kgugala has quit IRC19:33
*** kgugala_ has quit IRC19:46
*** kgugala has joined #litex19:46
*** HoloIRCUser1 has joined #litex19:46
*** HoloIRCUser has quit IRC19:49
_florent_gatecat: sorry, forgot to answer, thanks, yes it will be interesting to experiment with HBM220:14
*** pftbest has quit IRC21:02
*** pftbest has joined #litex21:03
*** pftbest has quit IRC21:03
*** pftbest has joined #litex21:03
nickoe_florent_: I am still trying to get my streaming thing working. Essetially reading data from SDRAM and popping it out with a slower rate. I am not sure how to LiteDRAMDMAReader efficently. Right now I am trying to take the data from LiteDRAMDMAReader and stuff it in to an AsyncFIFO to be able to pop out the data with a lower rate. But i am having issues with flow controlling it.22:28
nickoeDo you have any tips? ( no code attached to question as my current implemantion is messy and not really working... so I should probably start afresh...)22:30
*** pftbest has quit IRC22:35
*** pftbest has joined #litex22:36
*** pftbest has quit IRC22:53
*** pftbest has joined #litex22:55
*** shorne has quit IRC22:59
*** lf has quit IRC23:11
*** lf_ has joined #litex23:11
*** pftbest has quit IRC23:59
*** pftbest has joined #litex23:59

Generated by irclog2html.py 2.17.2 by Marius Gedminas - find it at https://mg.pov.lt/irclog2html/!