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| nickoe | _florent_: Hi. Did you see my comment in https://github.com/enjoy-digital/litex/issues/712#issuecomment-786304560 ? | 20:14 |
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| dayjaby | Nice, feel free to create a pull request with that :) | 20:17 |
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| nickoe | dayjaby: Well, I have not idea if that hides other problems or not | 21:29 |
| nickoe | I don't get this, in my vcd output file from my simlation I can't get the leds , but a friend of mine do get it! :O | 22:04 |
| nickoe | Anyone who can try it ouy? https://github.com/nickoe/litex-boards/tree/mars_ax3_sim | 22:04 |
| nickoe | to to the targets dir | 22:04 |
| nickoe | generate a demo.bin | 22:04 |
| nickoe | ./mars_ax3_sim_litex.py --with-sdram --sdram-init=demo.bin --with-analyzer --trace | 22:05 |
| nickoe | even though I have read through https://github.com/enjoy-digital/litex/wiki/Use-LiteScope-To-Debug-A-SoC a couple of times. I still struggle to understand what I can give to the analyzer_signals | 22:46 |
| somlo | 32-bit CSR data width support has landed upstream -- thanks again shorne_ ! (https://github.com/torvalds/linux/commit/a3905af5be36b9aa9f17657a02eeb2a08e939c13) | 23:09 |
| nickoe | somlo: What does that mean? | 23:09 |
| nickoe | I thought the registers were always 32 bit for a 32 bit riscv? | 23:10 |
| somlo | this also means that https://github.com/litex-hub/linux/tree/litex-rebase is now limited to containing device drivers only (https://github.com/torvalds/linux/compare/master...litex-hub:litex-rebase) | 23:11 |
| somlo | nickoe: in LiteX, "CSR" is slang for an MMIO device register (not to be confused with risc-v CSRs, which are a rather different thing altogether) | 23:12 |
| nickoe | ah, ok | 23:12 |
| nickoe | but meh, I am just stuck with my simulation here | 23:13 |
| somlo | nickoe: https://github.com/enjoy-digital/litex/wiki/CSR-Bus for the gory details :) | 23:14 |
| nickoe | I a not sure I have the brainwidth to consume that right now | 23:18 |
| somlo | I sympathize with that -- it's been a LOOONG February, glad it's almost over :) | 23:19 |
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