Monday, 2021-02-08

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somlois there a good "man page" equivalent for migen's "Record" ? Somehow it isn't mentioned in the migen documentation, and reading through genlib/record.py isn't really straightforward...02:25
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geertuMelkhior: You're right. An OrangeCrab with a dual-core SPARC CPU would be about half as fast as the 125 KEUR SS1000 when I was at university09:21
Melkhior@geertu Maybe not a fully loaded SS1000, they were able to fit 8 SuperSPARC... though I don't think they were > 50 MHz as standard, or perhaps in the 1000E?09:34
MelkhiorYou probably stlll need a bigger FPGA than that, if only to fit the FPUs... but we're getting there!09:34
Melkhior@Finde T1 is V9 so 64 bits, and openpiton targets quite a few cores... an interesting project, but another one that may require a (too) big FPGA...09:35
MelkhiorAnyway this week-end I finally ran out of space: needed 100.47% of my A7-35k to fit the dual-VexRiscv LiteX with all my extra instructions!09:36
MelkhiorNow I know why hardware people worry about space and sharing resources and won't write HW like it's just regular SW :-)09:36
MelkhiorAnother funny thing about the sd-card Linux driver on my board: it was working fine to read test binaries of the sd-card in SMP mode. Then I ran out of space and used a single core... and the binaries would be randomly corrupted and unusable! Mounting/md5sum/unmounting would have been a decent RNG : -) Disabled some instructions to save space, went10:09
Melkhiorback to dual-core, and now the sd-card works again in Linux (it's working no matter what to read the Image and rootfs in either UP or SMP from the firmware).10:09
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somloMelkhior: re. sdcard in linux, (assuming you're using the same driver that's currently in the litex-rebase branch of litex-hub/linux)11:49
somlowhat happens if you increase max_blk_count to e.g., 2 here: https://github.com/litex-hub/linux/blob/litex-rebase/drivers/mmc/host/litex_mmc.c#L414 ?11:49
MelkhiorI'm using @geertu 's kernel v5.11 ATM11:49
Melkhior@somlo will try that next time I try a UP kernel11:50
Melkhiors/kernel/bitstream/11:51
Melkhiorwith two (VexRiscv) cores it seems to always work...11:51
somloMelkhior: not sure which version of the sdcard driver is in geertu's 5.11 kernel (wondering/hoping it's the same)11:53
geertusomlo: somlo: It's based on a rebase of your tree from a while ago12:01
geertusomlo: Compared to your current tree, it lacks recent updates to "LiteX: driver for LiteSDCard (mmc)". But I haven't really used the SDcard, except for a quick heck if it works (i.e. dd | hexdump )12:04
geertus/heck/check/12:04
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MelkhiorSpeaking of cheap FPGA - would Litex be able to work with the MAX10 and peripherals in this $37 board: <https://www.arrow.com/en/products/deca/arrow-development-tools> ? That's really, really cheap for 512 MiB of RAM ! But I don't know that litedram would support it (or any of the other peripherals...)13:29
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MelkhiorWell this board has a 10M50DAF484C6G, the supported de10nano uses a 10M50DAF484C7G - just a speed grade difference ? So it would be a peripheral issue...13:32
Melkhiors/de10nano/de10lite/13:33
somlogeertu: might be worth me trying to apply whatever is in *your* tree and not in litex_rebase to the latter, so we can all work from the same tree... e.g., litex_rebase's first five patches are the stuff that's currently winding its way upstream via shorne's tree; I know there's at least one of your patches in the same situation, so we should throw it on top of that pile in litex-rebase...13:34
somlomaybe also add a vexriscv-specific defconfig to make it easy to build...13:36
geertusomlo: Sure. I've just rebased my local tree to v5.11-rc7, but haven't pushed it out, as it contains some more wip.13:36
somloand/or for whatever CPU you most frequently use13:36
geertusomlo: I have a litex_vexriscv_defconfig in my tree; -)13:36
geertuI don't use it myself, though.13:36
somlogeertu: this should all hopefully get easier once the fundamentals are upstream and all we're left with are device drivers and defconfigs :)13:37
geertusomlo: You're still at v5.11-rc6?13:39
somloI'm at whatever was current in upstream yesterday (currently 108 commits behind torvalds:master)13:40
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somloI have it so that I can just rebase litex-rebase whenever I fetch an updated master13:40
geertuMelkhior: I pushed out my rebase to v5.11-rc7, minus my wip13:41
geertusomlo: It's easier for other people if you stick to tagged bases13:42
geertuMelkhior: For me, "dd if=/dev/mmcblk0 count=10 | hexdump -C" always gives the same output13:43
geertu(vexriscv-smp with 1 core)13:44
somlowe can make that choice, but the cool thing is we don't *have* to -- nothing litex-specific currently in litex-rebase is tied to a specific version or rc or anything...13:44
geertusomlo: Some of the fixes I had in my tree are now in rc713:44
somlothe only occasional merge conflict is related to surrounding context lines in a makefile or Kconfig here and there, when other drivers get added upstream -- and last time that happened two months ago :)13:45
geertusomlo: sure, for the LiteX drivers13:45
somloright -- keeping litex drivers up to date w.r.t. the latest kernel is what "litex-rebase" is meant to do13:49
Melkhior@geertu It also works for me if I have two cores - at least that's what appear to be the case... single core corrupts data:-(  So I run dual, I still can fit my tests so far13:49
geertuMelkhior: strange. Perhaps it works for me because of Warning: Max frequency for clock              '$glbnet$sys_clk': 56.46 MHz (FAIL at 64.00 MHz)13:50
geertu;-)13:50
MelkhiorCurrently running VexRiscv @96 MHz as 100 MHz wasn't reliable anymore with too many instructions13:51
somloMelkhior: are you getting any errors from the sdcard driver e.g. "command failed, status 2" or similar?13:54
Melkhior@somlo Not sure, I don't think so but I'm not 100% certain... I didn't thoroughly investigate, switched back to dual-core to check if that was still working, it was, so I suck with that :-)13:55
MelkhiorI'll have to check next time I try single-core13:55
somlobecause for me (single-core rocket) I get perfect behavior on bare-metal bios, and lots of timeouts and breakage when I try to enable multi-block transfers -- and it all seems somehow timing related13:57
somloand, intuitively, your dual-core-works story seems to suggest that the sdcard hardware likes to enjoy one CPU's full undivided "attention" somehow (don't laugh, I'm trying to form a hypothesis here, rubbing my remaining two brain cells together :)13:58
somloand I had to increase the default SDPHY timeouts here: https://github.com/enjoy-digital/litex/blob/master/litex/soc/integration/soc.py#L148314:00
somloby adding "SDPHY(sdcard_pads, self.platform.device, self.clk_freq, cmd_timeout=10e-1, data_timeout=10e-1)"14:00
somloto get the single-block/cmd17-only linux sdcard driver to stop running into command/data/dma timeouts14:01
Melkhior@somlo not laughing, some weird timing issues that are masked by the dual-core being more available is what I was guessing as well. It also works fine in the BIOS with single- and dual- VexRiscv (but not single Rocket...)14:01
somlostill no good idea why that still won't improve multi-block (cmd-18) behavior, if I try to turn that on :(14:01
somlosingle rocket works great for me in the bios (on nexys4ddr with vivado, but also on the trellis board and ecpix5). But under linux it's even more flakey on ecp5 than on xilinx14:02
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somloMelkhior: I even disabled interrupts while in litex_request() (in the sdcard driver, single-core rocket), but that didn't seem to help15:11
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somloso I guess there's no way around doing it with "Maximum Effort (TM)" and undertanding everything about the underlying litesdcard FSMs, streams, migen records, the whole nine yards...15:30
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Melkhior_florent_ If I read correctly https://github.com/enjoy-digital/litedram, there's no generic DDR3 PHY, it's always FPGA-specific, so as there's is none for the MAX10 the memory on the Deca board would not work with litedram ?15:41
Melkhior@somlo Yes, but I don't have the skill to debug the sd-card... I still can use it to boot much faster than serial & load binaries w/o recreating the rootfs, I'm already quite happy with that15:44
somloMelkhior: that's nice (honestly happy for you, honestly not being sarcastic) :) Sadly for me, I want to boot Fedora on ecpix5 and/or the trellisboard, and it's still too slow for that :D16:06
somloI managed to mount, chroot to /mnt, and run nextpnr-ecp5 and yosys, but it takes like 5 minutes for the binaries to load from sdcard and execute :)16:08
Melkhior@somlo ouch:-)  to completely self-host the Rocket build I suppose ? Impressive achievement even if it's not fast :-)16:09
somloMelkhior: http://www.contrib.andrew.cmu.edu/~somlo/BTCP/#sec_5 :)16:10
tpbTitle: A Trustworthy, Free (Libre), Linux Capable, Self-Hosting 64bit RISC-V Computer (at www.contrib.andrew.cmu.edu)16:10
MelkhiorYes I know the project, that's what got me interested in LiteX in the first place :-)16:11
somlothe example uses spi-mode sdcard, but "native" litesdcard is only significantly faster on bare metal, and about as slow under linux... Which is why that's my current obsession :)16:11
MelkhiorI have a profesionnal interest in RISC-V so I follow the news16:11
somloand yeah, once I can build bitstream from source on the board for which I'm building it, I can retire (or sell out and become a $$$$ consultant, or whatever, wouldn't matter anymore :D :D)16:12
Melkhior:-)16:12
somloit's a bucket list thing, you see :D16:13
Melkhior... and then you can go back to OSX in QEMU/KVM;-)  that was a while ago...16:14
Melkhior... or do a macox-on-litex-microwatt, the circle would be complete :-)16:15
somloheh, digging through the edk2 sources is a traumatic experience, would not recommend it if *fun* is what you're after...16:16
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mikeK_de10nanohello16:41
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mikeK_de10nanohello18:46
mikeK_de10nanoOK, So I fianlly got Litex to compile for the DE10-nano. But I cannot seem to load it from the litex build scripts??18:47
mikeK_de10nanoInfo: Quartus Prime Convert_programming_file was successful. 0 errors, 0 warnings18:48
mikeK_de10nano    Info: Peak virtual memory: 313 megabytes18:48
mikeK_de10nano    Info: Processing ended: Mon Feb  8 13:46:00 202118:48
mikeK_de10nano    Info: Elapsed time: 00:00:0118:48
mikeK_de10nano    Info: Total CPU time (on all processors): 00:00:0118:48
mikeK_de10nanoError (213013): Programming hardware cable not detected18:48
mikeK_de10nanoTraceback (most recent call last):18:48
mikeK_de10nano  File "litex-boards/litex_boards/targets/de10nano.py", line 143, in <module>18:48
mikeK_de10nano    main()18:48
mikeK_de10nano  File "litex-boards/litex_boards/targets/de10nano.py", line 140, in main18:48
mikeK_de10nano    prog.load_bitstream(os.path.join(builder.gateware_dir, soc.build_name + ".sof"))18:48
mikeK_de10nano  File "/home/mikek/Documents/Cyclone5_SOC/Litex_directory/litex/litex/build/altera/programmer.py", line 19, in load_bitstream18:48
mikeK_de10nano    self.call(["quartus_pgm",18:48
mikeK_de10nano  File "/home/mikek/Documents/Cyclone5_SOC/Litex_directory/litex/litex/build/generic_programmer.py", line 100, in call18:48
mikeK_de10nano    raise OSError(msg)18:48
mikeK_de10nanoOSError: Error occured during USBBlaster's call, please check:18:48
mikeK_de10nano- USBBlaster installation.18:48
mikeK_de10nano- access permissions.18:48
mikeK_de10nanoBut I am able to load it with the Quartus_pgmw gui Window with the SOF file that was created from litex.18:49
mikeK_de10nanoI am using intel_FGPA_lite, Or Quartus version 20.1, Any info on how to start to troubleshoot? Thanks! MikeK18:49
mikeK_de10nanoJtagconfig Works completely fine. Able to see the DE10-nano board.18:50
mikeK_de10nano1) DE-SoC [1-4]18:50
mikeK_de10nano  4BA00477   SOCVHPS18:50
mikeK_de10nano  02D020DD   5CSEBA6(.|ES)/5CSEMA6/..18:50
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nickoe_florent_: Why is the litex main repo not under the litex-hub org?20:00
mikeK_de10nanoOK I figured out my Programming problem! the correct Command is "quartus_pgm -c 1 --mode=JTAG --operation="p;de10nano.sof@2""21:03
mikeK_de10nanoSo Anybody can help me with the pull request? Thanks!  :)21:04
nickoe_florent_: why is this called bscan_spi_.. https://github.com/litex-hub/litex-boards/blob/master/litex_boards/platforms/arty.py#L329 ? I mean -- why the spi part?21:06
nickoeor is that becasue that is intended to program the spi flash instead of just loading the bitstream to the fpga?21:18
nickoegetting closer to migrate to the latest litex...21:33
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mikeK_de10nanofixed the Programming Python file. How can I do a Pull Request?21:57
mikeK_de10nanoFixed DE10Nano programmer.py file. Line 15 should be: def __init__(self, cable_name="DE-SoC", device_id=2):21:58
nickoeHmm, it looks like sphinxcontrib-wavedrom is not instealled with the build script22:04
nickoemikeK_de10nano: ? I guess you just do a pull request.22:04
nickoeok, finally running synth agian22:16
zypmikeK_de10nano, never done one before?22:17
zypto do a github pull request, you fork the repo, push the changes to a branch in your fork and then open a pull request from that branch22:18
zypwhen you do the git push you'll get a message with a direct url to open the pull request22:19
nickoe_florent_: uhh wii, finally the LEDChaser works :D22:20
nickoebut memtest failed this time around22:20
nickoebut I better commit as is.22:20
nickoeNot the pretties, but it is there.. https://github.com/litex-hub/litex-boards/compare/master...nickoe:mars_ax322:24
nickoenow I wonder why the ram does not work, it worked with the stuff I had in the litex-buildenv stuff22:24
nickoethat is https://github.com/nickoe/litex-buildenv/tree/mars_ax322:25
nickoebut I also tried to "update" to the way the ram was setp for the arty.22:25
nickoecurrent output for completeness, https://dpaste.com/BK3EAAQWV22:29
tpbTitle: dpaste: BK3EAAQWV (at dpaste.com)22:29
nickoeWhat could I have forgot?22:29
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