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| oter | yoseng I cut/pasted the relevant bits of a LiteDRAMDMAReader example here: https://pastebin.com/Y6cuUAcJ. The bus width etc. (where not generic) are for the ECPIC-5 Lattice board (sorry, don't have yours). It's super naive, but helped me learn. As _florent_ pointed out, love using Litescope to see what's going on. Trigger the example DMA read sequence via a write to the CRG called "output". Any other trigger (button?) would do too. | 08:03 |
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| _florent_ | somlo: nice for Rocket, VexRiscv-SMP is in fact very similar and the CPU itself is also almost its own SoC | 08:41 |
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| Bk | Hi, i have a problem with picorv32. | 09:57 |
| Bk | I load on my fpga the project with interrupt enable | 09:57 |
| Bk | but when an interrupt occours the riscV doesn't enter in a irq function | 09:58 |
| Bk | i loaded the example function with a simple counter inside irq function | 09:58 |
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| _florent_ | Hi Bk, we would probably need more info about your use case. The default LiteX/PicoRV32 configuration uses interrupts for the UART and seems to be behaves correctly: | 10:42 |
| _florent_ | lxsim --cpu-type=picorv32 works correctly while commenting out https://github.com/enjoy-digital/litex/blob/master/litex/soc/cores/cpu/picorv32/core.py#L156 makes it fail | 10:43 |
| Bk | ok, i try to see better this. Another question. How can I load my main file in litex riscV project? | 10:45 |
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| Bk | my user case is receive ad interrrupt from external ip | 10:46 |
| Bk | my riscV must be enter in a fuction and print some ip informations | 10:47 |
| Bk | sorry for my bad english | 10:48 |
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| _florent_ | Bk: is you want to load application code to the CPU, you can have a look at: https://github.com/enjoy-digital/litex/wiki/Load-Application-Code-To-CPU | 11:33 |
| _florent_ | if you want a simple example with litex_sim, you can do: | 11:34 |
| _florent_ | litex_sim --cpu-type=picorv32 | 11:34 |
| _florent_ | then | 11:34 |
| _florent_ | litex_bare_metal_demo --build-path=build/sim/ | 11:34 |
| _florent_ | and | 11:34 |
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| _florent_ | litex_sim --cpu-type=picorv32 --ram-init=demo.bin | 11:35 |
| _florent_ | this will create a SoC with PicoRV32 and execute the demo app on it | 11:35 |
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| cr1901_modern | how do yo send input to the simulator? | 13:02 |
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| _florent_ | cr1901_modern: with litex_sim the UART is redirected to the console | 14:42 |
| _florent_ | so it's very similar to using the SoC on hardware through a terminal | 14:43 |
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| cr1901_modern | Ahhh that's cool. I might be able to dup my USB bug (see privmsg) then... | 15:53 |
| cr1901_modern | _florent_: ^^ | 15:53 |
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| ethanhs | Hi! Very cool project :) | 22:35 |
| ethanhs | Does anyone know if it is possible to buy a Trellisboard, I've been reading through some of the pcie/ethernet boards litex supports and I'm thinking of getting that or an Acorn | 22:37 |
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