Thursday, 2020-05-28

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somlo_florent_: https://github.com/enjoy-digital/litex/blob/master/litex/boards/targets/nexys4ddr.py#L10711:50
tpbTitle: litex/nexys4ddr.py at master 路 enjoy-digital/litex 路 GitHub (at github.com)11:50
somloone of those should be `args.with_sdcard` (without the `spi` part)11:50
_florent_somlo: thanks, that's fixed13:32
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somloanybody successfully built a mor1kx based soc on a nexys4ddr recently?18:47
somloand I mean *LiteX* soc, preferably from current upstream :)18:49
_florent_somlo: on my side i only tested it with lxsim recently, but could do the test tomorrow on the nexys4ddr18:57
_florent_somlo: is lxsim --cpu-type=mor1kx working?18:57
somlo_florent_: `lxsim` doesn't work directly, but `litex/litex/tools/litex_sim.py --cpu-type=mor1kx` gets me all the way to a bios prompt. I can't actually interact with it (nothing happens when I type stuff into it), but that's further than I get on the fpga19:09
somlotyping works when I use vexriscv instead of mor1kx, btw (in sim)19:10
_florent_ok, i'll do the test tomorrow19:15
CarlFKbunnie: kgugala_  can someone get me a netv2 bitstream with some easy to verify behavior so I can figure out if my pi loading system here is working?19:45
bunniehttps://github.com/AlphamaxMedia/netv2-fpga/tree/master/production-images19:46
tpbTitle: netv2-fpga/production-images at master 路 AlphamaxMedia/netv2-fpga 路 GitHub (at github.com)19:46
bunniethis has the production bitstream images, assuming you have the 35T version, use user-35.bit19:46
bunnieif you load it, the green LED near the TX port should flash19:46
CarlFKperfect19:47
bunniethis LED will flash even if there is no firmware to load, it's tied to a hardware counter that divides down the crystal directly.19:47
CarlFKbunnie: well... the led is already flashing.  so .. about all this tells me is my attempts at loading kgugala_'s is failing. which I kinda guessed19:58
CarlFKdo you have something handy that doesn't flash the led?19:59
bunniethe LED is already flashing?19:59
CarlFKyes.  I'm guessing is was shipped that way19:59
bunnieoh right, because of the default bitstream already on the board19:59
bunnieah yah here's a way20:03
bunnieon your board there is an ethernet connector20:03
bunniejust north of it, to the right of the "PROG" button20:03
bunniethere is a depopulated header that says "JTAG MODE" on it20:03
bunniejam a pair of tweezers in that, and hit the PROG button20:04
CarlFKwhile it is powered?20:04
bunnieyou should see the LEDs go to a sort of dim-orange state as the FPGA GPIOs all go into tri-state and stays in an unprogrammed state waiting for a JTAG bitstream20:04
CarlFKyes20:04
bunnieyah, you can do it while it's powered on20:04
bunniepunching the PROG button should make the FPGA latch the JTAG MODE pins and go into the wait-for-bitstream state20:07
bunnieyah i just tried it here and that works20:07
CarlFKbunnie: /home/pi/AlphamaxMedia/netv2-fpga/production-images/user-35.bit:4143: Error: unmatched "["20:14
CarlFK(pastbin off all the things coming up...20:14
bunnienot sure what is producing this error?20:16
bunnieis this the output of openocd or some shell script?20:17
CarlFKhttps://paste.debian.net/1149450/  sudo ~/AlphamaxMedia/openocd/src/openocd -f ~/AlphamaxMedia/netv2-fpga/production-images/user-35.bit20:18
tpbTitle: debian Pastezone (at paste.debian.net)20:18
CarlFKdoh..neever mind20:18
CarlFKI see my probelm20:19
bunnieah yep20:19
CarlFKsuccess!20:20
CarlFKlight off, light on.20:21
bunniegreat!20:21
bunnieevery journey of a million lines of code start with the blinking LED 馃檪20:21
CarlFKnew angle of "turn it off and on again"20:22
CarlFKbunnie: do you have some time to test this, tell us if it enumerates as a pci device? https://github.com/antmicro/netv2/tree/v4l220:38
tpbTitle: GitHub - antmicro/netv2 at v4l2 (at github.com)20:38
bunnieunfortunately, i don't have a convenient setup to test PCI at the moment.20:39
CarlFKk20:39
bunnieone small gotcha -- you want to make sure you are specifying the correct bitstream loading mode if you're doing PCI. you have like...some 100ms or so...to respond to enumeration on boot. if you go with default bitstream generation options, the FPGA can take too long and it will fail to enumerate because of that delay20:40
bunniethe tolerance to this delay depends on the system20:40
bunnieso some people might see it, others might not20:41
bunniebut this was a driving factor behind the choice of the SPI part, to make sure it could support a config mode that can roughly meet that timing requirement20:42
CarlFKbunnie: oh right.  also.. I forgot to flash while the linux box was at grub.20:46
CarlFKI was doing that, and ... at some point fogot I needed to do that :p20:46
CarlFKbunnie:  for you todo list: pi 4.20:48
CarlFKopenocd says "loaded file top.bit..."  but it didn't make the led flash20:50
CarlFKso I'll stop using my pi 4.  pi everywhere.20:51
bunnieyah the pi 4 probably has a different "timing coefficient" required in the .cfg file20:56
CarlFKmore success!!!  lspci  02:00.0 Memory controller: Xilinx Corporation Device 702120:58
CarlFKkgugala_: woo!!! ^^^20:58
bunniewoohoo!20:58
bunniegratz20:58
CarlFK:D20:59
kgugala_yaay20:59
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CarlFKok, onto Building and loading kernel module:21:00
CarlFKkgugala_: why does this need IP/username ?21:04
kgugala_the instructions assumed that the test PC is different than the one you work on21:06
kgugala_when we were developing the FPGA gateware and drivers it was not so stable21:07
kgugala_so testing on a different machine was a natural choice21:08
CarlFKgot it21:12
CarlFKkgugala_: kinda success - gst is displaying a skewed image of my pi21:39
* CarlFK[m] uploaded an image: 20200528_164050_502530674672938939.jpg (4286KB) < https://matrix.org/_matrix/media/r0/download/matrix.org/JXqoNZszEnAsaDvAvzJeOXkc >21:41
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CarlFKkgugala_: at a minimum, can you make the default localhost/$USER22:11
CarlFKand do you think the remote stuff  is still needed?22:11
awordnotgot my CLE-215 up and running (with the world's worst JTAG cable) :D https://imgur.com/a/Aar75hL22:14
tpbTitle: Imgur: The magic of the Internet (at imgur.com)22:14
awordnotnext step: play with litepcie22:14
CarlFKkgugala_: how do I connect to the console?23:14
futarisIRCcloudawordnot: It's not the worst JTAG cable. Poor's man programmer for FOMU: https://github.com/im-tomu/fomu-hardware/tree/master/hacker23:56
tpbTitle: fomu-hardware/hacker at master 路 im-tomu/fomu-hardware 路 GitHub (at github.com)23:56
awordnotfutarisIRCcloud: ha, I stand corrected!23:57
awordnotthat is delightfully terrible23:57

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