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| mfny | somlo: the nexys is long retired, cant get it | 00:10 |
|---|---|---|
| mfny | https://store.digilentinc.com/nexys-a7-fpga-trainer-board-recommended-for-ece-curriculum/ | 00:11 |
| tpb | Title: Nexys A7 Artix-7 FPGA Trainer Board - Digilent (at store.digilentinc.com) | 00:11 |
| mfny | this is the replacement.. its the same board with different name ? | 00:11 |
| mfny | will it work the same ? | 00:11 |
| Finde | nexys4ddr and nexysa7 are essentially the same yah | 00:12 |
| Finde | *yeah | 00:12 |
| mfny | so all the same support as the old board in respect of litex | 00:13 |
| mfny | ? | 00:13 |
| mfny | i.e ethernet, SD | 00:15 |
| mfny | and flash , is flash supported yet/now ? | 00:15 |
| mfny | nvm that board is to expensive | 00:17 |
| mfny | over £200 | 00:17 |
| mfny | other options ? | 00:18 |
| mfny | there is a DDR used ? https://www.ebay.co.uk/itm/Nexys-4-DDR-Artix-7-FPGA-Trainer-Board-140-292/254545972475?hash=item3b441f4cfb:g:ovgAAOSwD75edJWa | 00:19 |
| tpb | Title: Nexys 4 DDR Artix-7 FPGA, Trainer Board 140-292 | eBay (at www.ebay.co.uk) | 00:19 |
| mfny | is the flash on the Arty A7 large enough to boot Linux from ? | 00:24 |
| mfny | 16mb | 00:24 |
| Finde | mfny: there's a table of boards here - https://github.com/litex-hub/linux-on-litex-vexriscv | 00:25 |
| tpb | Title: GitHub - litex-hub/linux-on-litex-vexriscv: Linux on LiteX-VexRiscv (at github.com) | 00:25 |
| mfny | Finde: I know, but it seems like from that my options are all to expensive ? I need ether flash or SD boot and also ethernet ? | 00:27 |
| mfny | the only boards on that list that seem to do that are all over £200 exept for the Arty A7 | 00:27 |
| mfny | but the A7 flash may be to small ? | 00:27 |
| sajattack[m] | the linux image is only 12-ish MB | 00:29 |
| sajattack[m] | maybe 13 | 00:29 |
| mfny | also the Future Electronics Avalanche is not available to me for some reason from the FE site ? | 00:30 |
| mfny | says wrong region ? | 00:30 |
| mfny | actuly the Future Electronics Avalanche is no longer there at all ? | 00:33 |
| mfny | are there any other options not on that list maybe ? | 00:37 |
| mfny | that will work with minimal tweaking ? | 00:37 |
| john_k[m] | There are a ton of boards, you’re going to have the best luck with a board from the list. Anything else, there is going to be some work required. | 00:41 |
| john_k[m] | Unless you have experience with Vivado, I’d highly recommend going with an ECP5 based board. Adding an SD card to a board is probably the easiest thing to do, all things considered | 00:41 |
| john_k[m] | The Radiona ULX3S would be perfect for you but it’s not generally available yet - see https://www.crowdsupply.com/radiona/ulx3s | 00:44 |
| tpb | Title: ULX3S | Crowd Supply (at www.crowdsupply.com) | 00:44 |
| mfny | john_k[m]: would the normal ECP5 board work, the non versa ?.. oh wait .. no ethernet damnit | 00:46 |
| john_k[m] | Versa board has Ethernet | 00:47 |
| john_k[m] | I’m not sure if anyone has done the work to bring it up yet though | 00:47 |
| john_k[m] | I’ve got one here, but hasn’t been high on my priority list yet | 00:48 |
| mfny | john_k[m]: so it looks like my only option is the Arty A7 which has bootable flash, but not a lot of it and a supported ethernet ? | 00:52 |
| john_k[m] | You’d need to use Vivado for that one and I haven’t used it so can’t speak to its status | 00:53 |
| mfny | meh none of these options are very good it seems | 00:54 |
| mfny | well exept the ECP5 Versa and the Nexys A7 but they are £200+ | 00:55 |
| sajattack[m] | mfny: what are your goals for litex? | 00:58 |
| mfny | no particular projects as yet, more of a learning tool | 01:05 |
| mfny | but yeah it seems I am for the most part priced out of this | 01:07 |
| mfny | unless someone here can verify that the A7 indeed does work .. out of the box so to speak | 01:08 |
| sajattack[m] | I'm not sure litex is ready for an "out of the box" experience. depends on your definition I guess | 01:09 |
| sajattack[m] | imo, it's more of a tool for developers who already have a bit of experience | 01:12 |
| sajattack[m] | you pretty much have to read the code to understand anything that's going on | 01:14 |
| sajattack[m] | or ask around | 01:15 |
| awygle | hi mfny :) | 01:34 |
| mfny | hi | 01:50 |
| zyp | sajattack[m], that touches on a question I've been meaning to ask; are there any API docs available anywhere? | 01:55 |
| rjeschmi | zyp: for litex? | 01:55 |
| zyp | yes | 01:55 |
| rjeschmi | I found this useful: https://github.com/timvideos/litex-buildenv/wiki/LiteX-for-Hardware-Engineers | 01:56 |
| tpb | Title: LiteX for Hardware Engineers · timvideos/litex-buildenv Wiki · GitHub (at github.com) | 01:56 |
| rjeschmi | but overall the migen docs are a bit more thorough for syntax | 01:56 |
| rjeschmi | https://m-labs.hk/migen/manual/reference.html | 01:57 |
| tpb | Title: API reference Migen 0.8.dev0 documentation (at m-labs.hk) | 01:57 |
| zyp | already read that and I'm aware of the migen API reference, just missing one for litex | 01:57 |
| sajattack[m] | there are some doc comments I've seen but I'm not sure if they're processed and turned into a page available online anywhere | 01:57 |
| zyp | so far I've been digging through the code to figure out how to use it, which works, but a proper reference would save time | 01:58 |
| sajattack[m] | I'm gonna guess that's a no https://litex.readthedocs.io/en/latest/ | 02:00 |
| tpb | Title: Welcome to Read the Docs litex latest documentation (at litex.readthedocs.io) | 02:00 |
| sajattack[m] | you could try running sphinx locally maybe | 02:00 |
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| sajattack[m] | how do I represent a signal indexed by another signal in migen? | 07:48 |
| sajattack[m] | Like this: https://github.com/tmatsuya/milkymist-ml401/blob/8886e6385eebdccdbd7be792fc3ea2c52bbcfbac/cores/ps2/rtl/ps2.v#L215 | 07:48 |
| sajattack[m] | it says `Cannot use type Signal as key` if I try to do it the way I'd expect | 07:48 |
| tpb | Title: milkymist-ml401/ps2.v at 8886e6385eebdccdbd7be792fc3ea2c52bbcfbac · tmatsuya/milkymist-ml401 · GitHub (at github.com) | 07:48 |
| zyp | what is the way you expect? | 08:03 |
| _florent_ | mfny: for Linux-on-LiteX-Vexriscv and boards that are not too expensive (~100$), i would recommend the Versa ECP5, ULX3S, OrangeCrab or Arty A7. If SDCard is missing, it's easy to use a PMOD or IOs to add that. | 08:08 |
| _florent_ | sajattack[m]: you can use Array: https://github.com/m-labs/migen/blob/master/examples/basic/arrays.py | 08:09 |
| tpb | Title: migen/arrays.py at master · m-labs/migen · GitHub (at github.com) | 08:09 |
| mfny | _florent_: the Versa ECP5 is not $100, its over double that ? | 08:11 |
| mfny | $208 on Digikey, but that's £200 to me as I am in the UK with VAT | 08:13 |
| mfny | so where are you seeing it at 100 bucks ? | 08:13 |
| sajattack[m] | _florent_: hmm but then I can't use .eq in another part of the code | 08:14 |
| _florent_ | mfny: ah sorry, IIRC Lattice is sometimes doing discount for it and sells it at 99$, but the regular price is indeed around 200$ | 08:14 |
| _florent_ | https://www.semiconductorstore.com/blog/2016/For-a-limited-time-get-the-Lattice-ECP5-Versa-Development-Board-for-only-99-00/1799/ | 08:15 |
| tpb | Title: For a limited time, get the Lattice ECP5™ Versa Development Board for $99.00 (at www.semiconductorstore.com) | 08:16 |
| mfny | thats from 2016 | 08:18 |
| sajattack[m] | I figured it out | 08:22 |
| sajattack[m] | thanks | 08:22 |
| _florent_ | If you are ok using Vivado (for now), the Arty A7 is a good option: easy to get, 130$, DDR3/Ethernet/PMODs/SPIFlash. That's the board i probably using the most. It's possible to boot Linux from the SPI Flash and you can easily add a SDCard PMOD. The open source ECP5 boards are also really nice, but you'll probably have to wait a bit. | 08:23 |
| sajattack[m] | now I have another question, how do I tell when a CSRField is being accessed? | 08:23 |
| sajattack[m] | more concretely, replicate this logic https://github.com/tmatsuya/milkymist-ml401/blob/master/cores/ps2/rtl/ps2.v#L189 | 08:24 |
| tpb | Title: milkymist-ml401/ps2.v at master · tmatsuya/milkymist-ml401 · GitHub (at github.com) | 08:24 |
| sajattack[m] | it looks like a raw csr can do it via we and re but idk what to do for csrfield | 08:25 |
| sajattack[m] | oh hang on | 08:28 |
| sajattack[m] | a csrfield is a split up csr | 08:28 |
| sajattack[m] | I guess I'm doing it too deep down the chain | 08:28 |
| sajattack[m] | I need to do it on the csrstorage, not on the csrfield? | 08:28 |
| sajattack[m] | then why does it tell me csrstorage has no attribute 'we' | 08:30 |
| * sajattack[m] sent a long message: < https://matrix.org/_matrix/media/r0/download/matrix.org/dohCuVHuIvSWemEWOtUiKrPm > | 08:31 | |
| sajattack[m] | that would do it | 08:31 |
| sajattack[m] | why doesn't CSRStatus have re like CSRStorage does? | 08:35 |
| sajattack[m] | I thought a CSRStatus was just a read-only CSRStorage | 08:35 |
| _florent_ | For CSRStatus, there is a we signal you can use to know when the CSRStatus is read (sorry the names are indeed confusing): https://github.com/enjoy-digital/litescope/commit/7a9fa9d3b18362bf707dff25a78661395ef9ee7a | 08:37 |
| tpb | Title: core: use new CSRStatus.we signal to speed-up Storage upload (>10x sp… · enjoy-digital/litescope@7a9fa9d · GitHub (at github.com) | 08:37 |
| sajattack[m] | oh weird | 08:38 |
| sajattack[m] | ok | 08:38 |
| _florent_ | sajattack[m]: i'm trying to spend some time creating a proper wiki, i'll make sure we document this | 08:41 |
| sajattack[m] | yeah take your time | 08:42 |
| sajattack[m] | I know it's hard to do docs when a project is still in it's infancy | 08:42 |
| sajattack[m] | and constantly evolving | 08:43 |
| mfny | _florent_ so the A7 is pretty much "fully supported" right now ? with LiteX .. no major caveats ? | 08:46 |
| _florent_ | mfny: yes, the A7 is fully supported and tested regularly (that's the one i used the most for regression testing). It's also the board that is used by Symbiflow/PrjXRay to validate things on hardware, so you can find examples to use the open source tools with it. | 08:52 |
| _florent_ | sajattack[m]: btw, for your SDCard issue, it's the change from 400KHz to 16MHz after the initialization that breaks things on your side? (ie https://github.com/enjoy-digital/litex/commit/2bf31a31da336b628825aced248396b8ba3e3105#diff-7469999040746bb90f3e3fc8a8a1b1e8?) | 08:55 |
| tpb | Title: Reclock spi sdcard access after initialisation · enjoy-digital/litex@2bf31a3 · GitHub (at github.com) | 08:55 |
| mfny | _florent_ so realy its between the ECP5 Versa, Arty A7 and the Nexys A7 for full support then ? | 10:02 |
| mfny | or so it seems | 10:03 |
| mfny | the Nexys A7 is the Nexys 4 DDR with a new name | 10:04 |
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| _florent_ | mfny: the others boards as also fully supported but are generally more expensive, i only listed the ones with a good capabilities/cost ratio | 10:34 |
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| sajattack[m] | _florent_: yeah I checked with git bisect and the commit it reported was the reclock one | 10:41 |
| sajattack[m] | https://matrix.to/#/!njNLVSISzXbRIRJASZ:matrix.org/$1584814214430548HFqtH:matrix.org?via=matrix.org | 10:42 |
| tpb | Title: [matrix] (at matrix.to) | 10:42 |
| sajattack[m] | er, I guess that doesn't help for you irc guys | 10:42 |
| sajattack[m] | `2bf31a31da336b628825aced248396b8ba3e3105 is the first bad commit` | 10:43 |
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| mfny | _florent_ I need a board with SD or Flash boot and Ethernet and those boards I mentioned are the only ones that have that right now ? | 10:47 |
| _florent_ | The nexysA7 has all this, the Arty A7 and Versa can boot from SPI Flash but will be missing the SD, but you can use a 10$ a PMOD ( https://store.digilentinc.com/pmod-microsd-microsd-card-slot ) | 10:53 |
| tpb | Title: Pmod MicroSD: microSD Card Slot - Digilent (at store.digilentinc.com) | 10:53 |
| mfny | _florent_: is that PMOD supported as is by the litex bsp for the A7 ? | 10:54 |
| _florent_ | The versa is also already well supported by the open-source toolchains and has 2 x 1Gbps ethernet ports (vs 100Mbps on NexysA7/ArtyA7), for the Digilent board you will need to use Vivado for now | 10:55 |
| mfny | I may be able to go for something like the versa .. maybe | 10:56 |
| _florent_ | for the SDCard PMOD, you will just need to add the few pins to the platform definition, similar to this for example: https://github.com/litex-hub/litex-boards/commit/57bcadb5b4c1a0a2592b5e85bdd98ab375ce7e33 | 10:56 |
| tpb | Title: platforms/nexys4ddr: add spisdcard pins. · litex-hub/litex-boards@57bcadb · GitHub (at github.com) | 10:56 |
| mfny | oh ok that seems simple enough | 10:58 |
| mfny | btw the reason I am here is because I bought a Pynq Z2 board and the support/docs have been not great for anything other then the official Pynq SD image | 11:00 |
| mfny | i.e if you are not using Pynq via the official SD image you are on your own | 11:00 |
| mfny | the BSP does not even work with a standard Petalinux built.. nor does it work for Vitis Linux Apps ether | 11:01 |
| mfny | so I am returning the Z2 | 11:02 |
| _florent_ | ok i see, you can also run LiteX on Zynq, but you have to share peripherals between PS and PL and the memory is generally directly connected to the PS, so that make things more complicated for Linux-on-LiteX-Vexriscv since we would need to access the DDR3 through the AXI interface of the PS. | 11:06 |
| sajattack[m] | _florent_: any tips on setting up wishbone-tool? | 11:07 |
| _florent_ | sajattack[m]: to use it over UART/Ethernet? | 11:08 |
| sajattack[m] | uart aye | 11:09 |
| sajattack[m] | https://termbin.com/838a | 11:09 |
| sajattack[m] | that's what I have so far | 11:09 |
| sajattack[m] | just hangs and I don't even get bios | 11:09 |
| sajattack[m] | I'm trying to do some reads of my ps2 CSRs for testing | 11:10 |
| _florent_ | the easiest way would be to specific serial pins for that in your platform | 11:12 |
| _florent_ | do you have an USB/UART dongle you can use for that? | 11:12 |
| sajattack[m] | yeah | 11:12 |
| sajattack[m] | I'm using the same pins as the bios | 11:12 |
| _florent_ | ah ok you are using the uart in crossover mode | 11:14 |
| mfny | _florent_: this IRC has already been far more helpful then the Offical Pynq forums have been re my Z2 issues | 11:14 |
| sajattack[m] | I copied from esden | 11:14 |
| mfny | i mean in terms of answering my questions about Litex | 11:14 |
| mfny | relative to the Pynq forums answering about the Z2 | 11:15 |
| mfny | when I am looking at Dev boards and anything related to them i look at the community support and documentation | 11:16 |
| mfny | very important | 11:16 |
| _florent_ | mfny: ok, glad we've been able to help you. If you are new to FPGA, you should probably start using raw FPGAs (is without processing systems like Zynq), it's easier to start with and understand things. | 11:16 |
| mfny | i am ether gonna buy a diffent better supported Zynq board, or get something that can run Litex | 11:17 |
| _florent_ | sajattack[m]: if you have a USB/UART dongle, you can just try this: https://github.com/enjoy-digital/litex/wiki/Use-Host-Bridge-To-Control | 12:01 |
| tpb | Title: Use Host Bridge To Control · enjoy-digital/litex Wiki · GitHub (at github.com) | 12:01 |
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| somlo | mfny: Think of the Zynq chip as either an FPGA with special hard-IP (asic) CPUs you can connect to the other configurable blocks on the fpga die, or as a hard-IP, asic, CPU with some FPGA fabric "coprocessor" :) On the plus side, you have an FPGA witha hardware-acelerated (pair of) cpus that can do cool things for you; on the downside, if you want to do soft-IP ("pure FPGA" things, like LiteX) you're limited to accessing the RAM on your dev board | 12:43 |
| somlo | through the asic CPU. Like _florent_ said, if learning about FPGAs and digital design is your main goal, stay away from the Zynq; if, OTOH, you have a specific application in mind, and the Zynq's hard-wired arm cpu cores are specifically helpful for that, that's a whole different reason to stick with Zynq :) | 12:43 |
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| keesj | lo | 14:36 |
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| tnt | Is there a way for the litex SPI to set QE=1 on boot ? | 18:06 |
| _florent_ | tnt: not yet :) i'm generally setting it with OpenOCD, but that could indeed be useful | 18:20 |
| HoloIRCUser1 | the link to 'use host bridge to control' was broken in the wiki sidebar. Correct link should be https://github.com/enjoy-digital/litex/wiki/Use-Host-Bridge-to-control-debug-a-SoC | 18:31 |
| tpb | Title: Use Host Bridge to control debug a SoC · enjoy-digital/litex Wiki · GitHub (at github.com) | 18:31 |
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| tnt | _florent_: yeah, just bit me. First time all the weird letters at the end of the flash chip part number had any importance :p | 18:36 |
| _florent_ | tnt: here is an OpenOCD patch to set it: https://github.com/enjoy-digital/openocd/commit/d10978c9729efa3735a25e75b2ee03503b86edce | 18:39 |
| tpb | Title: add jtagspi set_qe command · enjoy-digital/openocd@d10978c · GitHub (at github.com) | 18:39 |
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| _florent_ | tnt: you can then set it in your OpenOCD script with jtagspi set_qe 0 1 | 18:40 |
| tnt | _florent_: I modified iceprog to set it. | 18:40 |
| _florent_ | ah ok | 18:40 |
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| tnt | Am I mis-understanding how to use the uart : I would expect this to be an echo : | 19:38 |
| tnt | if (!uart_rxempty_read()) | 19:39 |
| tnt | uart_rxtx_write(uart_rxtx_read()); | 19:39 |
| tnt | But instead as soon as I send ca char to the SoC, it crashes / stops executing. | 19:39 |
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| mfny25 | _florent_: does the arty a7 indeed have enough flash and logic to fully use LiteX ? 16mb flash seems tight and I am reading that for more complex stuff the 35t is a bit tight also ? | 19:49 |
| tnt | huh, if I don't use the generated accessor bu access it as a byte (instead of uint32_t) manually with volatile uint8_t * ... it works better. | 20:28 |
| _florent_ | mfny25: it depends what you want to do with the board, but i found the size of the FPGA quite adapted on the Arty A7 regarding the peripherals the board has. I never went out of logic with it, and with Symbiflow, you'll be able to use it as a 50T :) | 20:49 |
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| mfny25 | _florent_ what about the flash issue ? | 23:15 |
| mfny25 | also would there be support for this in LiteX ? https://store.digilentinc.com/pmod-i2s2-stereo-audio-input-and-output/ | 23:42 |
| tpb | Title: Pmod I2S2: Stereo Audio Input and Output - Digilent (at store.digilentinc.com) | 23:42 |
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