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| futarisIRCcloud | So I tried hooking up vexriscv (linux) to a Spartan 6 by modifying the linux-on-litex-vexriscv repo. The smallest one that would place & route is a xc6slx25. Too many SLICEMs for the xc6slx16 or the xc6slx9 in the mimasv2. | 04:58 |
|---|---|---|
| keesj | what is mimasv2? | 05:54 |
| futarisIRCcloud | keesj: https://numato.com/product/mimas-v2-spartan-6-fpga-development-board-with-ddr-sdram | 06:11 |
| futarisIRCcloud | 50 USD FPGA board | 06:12 |
| keesj | I see yea . all my sparan boards are ... not good enough (papilio pro lx9 , lambdaconcept lx16) | 06:34 |
| futarisIRCcloud | The cheapest FPGA chip that it might work on, is probably the: LFE5U-12F ... | 06:45 |
| futarisIRCcloud | https://github.com/SymbiFlow/prjtrellis/issues/55 / --idcode 0x21111043 | 06:47 |
| tpb | Title: Missing support for LFE5-12F devices · Issue #55 · SymbiFlow/prjtrellis · GitHub (at github.com) | 06:47 |
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| _florent__ | Hi, i just added SPI flash support to the arty target in https://github.com/enjoy-digital/linux-on-litex-vexriscv | 09:43 |
| tpb | Title: GitHub - enjoy-digital/linux-on-litex-vexriscv: Experiments with Linux on LiteX-VexRiscv (at github.com) | 09:43 |
| _florent__ | if anyone want to test, the only thing to do is install openocd, litex and do ./arty.py --flash | 09:43 |
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| Dolu1990 | Nice for the flash :D | 10:24 |
| futarisIRCcloud | Dolu1990: Did you say you only have a DE1-SoC (Cyclone V) board? | 11:03 |
| Dolu1990 | As a linux ready board, yes, or also a DE0-70, but that's realy old stuff | 12:23 |
| Dolu1990 | Anyway | 12:24 |
| Dolu1990 | I will probably get a new board, with a better fit | 12:24 |
| Dolu1990 | Ahh no, DE2-70. Currently, Artix look sexy, for speed reasons, but ECP5 seem also great for price reasons | 12:39 |
| Dolu1990 | Also have to look about opensource synthesis, avoiding the vendor flow is always welcome ^.^ | 12:42 |
| Dolu1990 | LFE5U-12F + cheap SDRAM + flash would mean around 10$ linux ready FPGA BOM, and maybe that's realy a thing ? | 12:49 |
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| mithro | Dolu1990: I would be more than happy to send you an Arty A7 board | 16:44 |
| mithro | Dolu1990: You have competition - https://github.com/enjoy-digital/litex/issues/177 :-) | 16:47 |
| tpb | Title: Import the Taiga high performance RISC-V core · Issue #177 · enjoy-digital/litex · GitHub (at github.com) | 16:47 |
| Dolu1990 | mithro: Thanks :) I didn't knew about TAIGA, i'm looking at it right now :D | 17:03 |
| mithro | Dolu1990: I think you beat them currently - but the student working on it is *super* smart, so watch out :-) | 17:03 |
| Dolu1990 | There is much good features in their softcore ^.^ | 17:04 |
| mithro | Dolu1990: They are aiming for 2+ DMIPs/MHz | 17:07 |
| mithro | Dolu1990: You should check out their paper from FCCM on an alternative way to do divide | 17:08 |
| mithro | Rethinking Integer Divider Design for FPGA-based Soft Processors- Eric Matthews, Alec Lu, Lesley Shannon and Zhenman Fang | 17:09 |
| mithro | Dolu1990: Send me a postal address + phone number to [email protected] and I'll get you an Arty A7 board | 17:09 |
| Dolu1990 | It there more ressources than https://carrv.github.io/2017/papers/matthews-taiga-carrv2017.pdf about taiga ? | 17:42 |
| Dolu1990 | * Is there * | 17:42 |
| _florent__ | mithro: thanks for taiga, i'll look at that | 18:13 |
| _florent__ | mithro: btw, somlo should also have Rocket working soon | 18:14 |
| _florent__ | mithro: if you want to do demo at Latchup of Linux with VexRiscv and have an Arty, the only thing you have to do with the repo is ./arty.py --flash :) | 18:15 |
| mithro | _florent__: Need a monitor or something to connect to it | 18:16 |
| mithro | Dolu1990: Sadly I haven't found much apart from their repository | 18:16 |
| somlo | _florent__, mithro: once I figure out how to talk to the Rocket PLIC to correctly handle interrupts, I think it will be ready | 19:07 |
| * somlo keeps fingers crossed (famous last words) :D | 19:08 | |
| Dolu1990 | Thanks :) | 19:23 |
| Dolu1990 | In case of, I will be in the Zurich WOSH + RISC-V member day. | 19:24 |
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| mithro | somlo: Why do you care about rocket? | 21:00 |
| mithro | Dolu1942: Do you have any spartan 6 hardware? | 21:03 |
| Dolu1942 | Only ICE40[UP], Cyclone V | 21:05 |
| somlo | mithro: I want to run an upstream standard (except maybe for peripheral dev drivers) kernel, and a "real" distro like Fedora or Debian | 22:31 |
| somlo | mithro: basically, lowRISC except without the proprietary IP blocks from Vivado :) | 22:32 |
| somlo | and without Vivado, while we're at it | 22:33 |
| mithro | somlo: We should be in a place to do something like that on VexRISCV or Taiga soon.... | 22:38 |
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| futarisIRCcloud | Dolu1990: tinyfpga_ EX is supposed to have the 12F and HyperRAM. Not sure how much cheaper the BOM would be with SDRAM. | 23:05 |
| Dolu1942 | hyper ram is only 8 MB of ram right ? | 23:07 |
| futarisIRCcloud | somlo: If you add the required float and double stuff to the machine mode emulator, a generic 32 bit Linux kernel should run. | 23:07 |
| futarisIRCcloud | 8MB on the PMOD hyperram board. Not sure if bigger chips are available. Uses a lot less pins than SDRAM. | 23:08 |
| futarisIRCcloud | About eleven years ago, I was fiddling with MaverickCrunch, and looking to implement soft-divide, on a processor that had hard float multiply: | 23:10 |
| futarisIRCcloud | https://marc.info/?l=gcc&m=121030165509897&w=2 | 23:10 |
| tpb | Title: 'Division using FMAC, reciprocal estimates and Newton-Raphson - eg ia64, rs6000, SSE, ARM Maverick' - MARC (at marc.info) | 23:10 |
| daveshah | Will probably be a few months time but the BlackEdge will have an ECP5 with DDR2 | 23:10 |
| daveshah | https://forum.mystorm.uk/t/the-blackedge-project/500 | 23:10 |
| tpb | Title: The BlackEdge project - Announcements - myStorm (at forum.mystorm.uk) | 23:10 |
| daveshah | Probably 16MB for the 12k and 128MB for the 45k | 23:10 |
| Dolu1942 | about SDRAM-SDR i have seen some chips for 2$ | 23:12 |
| daveshah | Yeah DDR2 pricing is similar | 23:12 |
| daveshah | 128MB for $3 one off | 23:13 |
| daveshah | https://www.digikey.com/products/en?mpart=W971GG6SB-25&v=256 | 23:13 |
| futarisIRCcloud | daveshah: I'm surprised PaulStoffregen of teensy hasn't announced something yet. Isn't he based near where latchup.io is? | 23:24 |
| futarisIRCcloud | mithro / xobs : https://twitter.com/QwertyEmbedded/status/1124756761351581696 | 23:33 |
| mithro | futarisIRCcloud: Paul is at latchup, I've meet him now :-) | 23:34 |
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| futarisIRCcloud | mithro: Cool. If only Sam Zeloof was there too. https://twitter.com/szeloof/status/1122345411627442176 | 23:41 |
| mithro | Oh cool -> https://github.com/wavedrom/verilog | 23:46 |
| tpb | Title: GitHub - wavedrom/verilog: wavedrom to verilog converter (at github.com) | 23:46 |
| futarisIRCcloud | Good for unit tests. | 23:51 |
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