Friday, 2019-04-05

*** tpb has joined #litex00:00
_florent_mithro: cool, thanks05:32
_florent_mithro: next step: go further in the inception demo daveshah presented and also run LiteX/Migen (+Yosys/Nextpnr ) :)05:36
futarisIRCcloud_florent_: We can already do that in qemu. Should be trivial enough to run it on hardware.05:58
_florent_futarisIRCcloud: nice!06:09
*** xobs has quit IRC06:39
*** xobs has joined #litex06:48
*** futarisIRCcloud has quit IRC09:04
*** futarisIRCcloud has joined #litex09:40
*** xobs has quit IRC10:01
*** xobs has joined #litex10:09
*** futarisIRCcloud has quit IRC13:59
somloI'm at the point where I need to provide a crt0-rocket.S file (in litex/soc/software/libbase); I'm looking at existing crt0-*.S files trying to make sense of what's actually supposed to be going on -- any clues or pointers would be super helpful right now... :)15:16
somloso, assuming crt0-vexriscv.S is the "closest", looks like I need to provide an entry point to "everything" (_start), which sets up the "trap_entry" (does it have to be marked .global, since it's only ever referenced within crt0-vexriscv.S?), then initializes the bss, and calls main()15:31
somloso maybe replacing sw & lw with sd and ld is most of what I need ?15:35
somloone more: why is the "j crt_init" followed by all those nop instructions (https://github.com/enjoy-digital/litex/blob/master/litex/soc/software/libbase/crt0-vexriscv.S#L6) -- is that an alignment thing?15:36
tpbTitle: litex/crt0-vexriscv.S at master · enjoy-digital/litex · GitHub (at github.com)15:36
somlo* alignment for trap_entry, that is ?15:36
*** spacekookie_ has joined #litex22:05
*** acathpala has joined #litex22:06
*** tinyfpga_ has joined #litex22:08
*** acathla has quit IRC22:09
*** tinyfpga has quit IRC22:09
*** spacekookie has quit IRC22:09
*** spacekookie_ is now known as spacekookie22:22

Generated by irclog2html.py 2.13.1 by Marius Gedminas - find it at mg.pov.lt!