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| bjonnh | jevinskie[m]: oh good to know, thanks | 00:00 |
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| sajattack[m] | every wishbone read gives all f's | 00:09 |
| jevinskie[m] | The bus doesn’t lock up though? | 01:14 |
| sajattack[m] | it doesn't get stuck when I ask litex_cli to do a read, if that's what you're asking | 02:43 |
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| keesj | ```````````````````````````````` | 05:50 |
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| Melkhior | sajattack[m]: the L2 matters; memory access have to go through the Wishbone instead of directly to he native SDRAM port | 06:00 |
| Melkhior | 8 fpus is quite a lot, but if the design pass timings it shouldn't matter... | 06:00 |
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| sajattack[m] | <Melkhior> "sajattack: the L2 matters..." <- Aha | 11:32 |
| acathla | I plugged different SPI devices (flash+ADC+IMU) on the same lines, except for the CS signal, to the iCE40up5K. Is there a simple way to use LiteSPI to communicate with all the devices? Is there an example somewhere? | 12:20 |
| acathla | May be bitbanging is the fastest... | 13:55 |
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| _florent_ | acathla: for now this is not really supported by LiteSPI, but you can use the SPIMaster core for this: https://github.com/enjoy-digital/litex/blob/master/litex/soc/cores/spi.py#L166-L177 | 14:10 |
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| bjonnh | jevinskie[m]: someone recommended me https://www.crowdsupply.com/radiona/ulx3s | 15:00 |
| tpb | Title: ULX3S | Crowd Supply (at www.crowdsupply.com) | 15:00 |
| bjonnh | I just need audio out, so that could do it | 15:00 |
| sajattack[m] | If you just need audio, maybe wait for https://github.com/daglem/redip-sid | 16:05 |
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| tpw_rules | _florent_: did you ever have a chance to look at my upload? | 19:45 |
| bjonnh | sajattack[m]: I'm looking for something that I could repurpose later | 19:52 |
| bjonnh | I want to play with sound synthesis, so it could be useful if it had ethernet and so on | 19:53 |
| bjonnh | to push things to it later | 19:53 |
| bjonnh | and add midi etc | 19:53 |
| sajattack[m] | ah ok | 19:53 |
| sajattack[m] | then yeah ulx3s looks pretty sweet | 19:53 |
| sajattack[m] | but you did say "I just need audio out" :P | 19:53 |
| bjonnh | sure | 19:54 |
| bjonnh | the problem is that this ulx3s only has 4bit audio | 19:54 |
| bjonnh | so it will sound like crap | 19:55 |
| bjonnh | (at least that's what mupuf said) | 19:55 |
| bjonnh | mupuf: here I drag you into the conversation | 19:55 |
| gatecat | I think you can use delta sigma to get much higher quality | 20:00 |
| gatecat | rather than using it directly as a 4 bit DAC | 20:00 |
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| bjonnh | but then I have to add circuitry right? the FPGA doesn't have that inside. | 20:29 |
| bjonnh | mupuf said that adding a pmod would be an easy solution | 20:29 |
| gatecat | no, it relies on running the FPGA output much faster than audio frequencies | 20:36 |
| gatecat | https://github.com/emard/ulx3s-misc/tree/master/examples/audio is an example of this kind of thing, it's PWM not delta sigma | 20:36 |
| gatecat | delta sigma type approach would probably be even better, but either way it should be possible to do a lot better than 4 bits | 20:36 |
| bjonnh | I just pre-ordered the ulx3s, I think I'll have enough to learn before worrying about the quality of the output | 20:55 |
| bjonnh | My only experience is making things with the Fomu | 20:56 |
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