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| Zevv | is there a way for yosys+nextpnr to estimate max timing for a 'loose' verilog module without having to place it in a larger design and constraint it to IO? | 06:43 |
|---|---|---|
| Zevv | I'd like to optimize at a more fine grained level and get timing details for the individual modules of my design | 06:43 |
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| gatecat | Zevv: You can use --out-of-context for nextpnr, but I think this is only implemented for ECP5 at the moment | 08:42 |
| Zevv | thanks | 09:43 |
| Zevv | not having any clue of what i'm doing, I ported that ooc code to ice40, and at least i'm able to get me device utilisation stats now. that's nice already. | 10:21 |
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