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| Myrl-saki | I uh | 04:57 |
|---|---|---|
| Myrl-saki | Turns out >LUT4s was what's been killing my cell usage? | 04:57 |
| Myrl-saki | I enabled nowidelut, and everything is much better. | 04:58 |
| Myrl-saki | I am so confused. | 04:58 |
| Myrl-saki | Like, it's the difference between 2000 and 4000 LUTs. | 05:02 |
| Myrl-saki | And I see a lot of LUT1s. I'm guessing these are inverters? | 05:03 |
| Myrl-saki | Or are they, erm, repeaters? | 05:03 |
| lofty | Myrl-saki: they're inverters. Have you considered synth_gowin -abc9? | 05:33 |
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| corecode | Myrl-saki: do you write tests? | 08:11 |
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| Myrl-saki | corecode: Not yet, but I've been making more simulation code. | 09:11 |
| Myrl-saki | ERROR: Module 'DFFC' with (* abc9_box *) has no timing (and thus no connectivity) information. | 09:20 |
| Myrl-saki | lofty: | 09:20 |
| Myrl-saki | Hmm | 09:23 |
| lofty | Um. What's your Yosys version? | 09:23 |
| lofty | Oh, right, I see the issue | 09:23 |
| Myrl-saki | Should be the latest. | 09:23 |
| Myrl-saki | Ah, should these be abc9_flop? | 09:24 |
| lofty | No | 09:25 |
| lofty | These don't fit the model of abc9_flop | 09:26 |
| lofty | However | 09:26 |
| lofty | abc9_box describes something combinational | 09:26 |
| lofty | and a certain past somebody seems to have written them as sequential paths instead | 09:26 |
| lofty | >.> | 09:26 |
| Myrl-saki | Hm, now I'm slightly curious what's causing the DFFC though. Maybe it's my initialization? | 09:28 |
| Myrl-saki | I don't think I'm using asynchronous clear anywhere | 09:28 |
| lofty | are you using asynchronous set? | 09:29 |
| Myrl-saki | I don't *think* so. I'll try to see if I can figure out why. | 09:29 |
| Myrl-saki | Ah, I think it's just the fact that cells_sim.v gets loaded? | 09:37 |
| Myrl-saki | Oh hm | 09:37 |
| lofty | Myrl-saki: https://github.com/YosysHQ/yosys/pull/3977 | 09:38 |
| Myrl-saki | Thanks. :) | 09:38 |
| Myrl-saki | :o | 09:47 |
| Myrl-saki | wow | 09:47 |
| Myrl-saki | So it's halfway between nowidelut and abc widelut. | 09:48 |
| Myrl-saki | Thanks. :) | 09:48 |
| lofty | Which gives you the performance of ABC widelut (better, actually), while being noticeably less area | 09:48 |
| Myrl-saki | Yep! Because of routing and whatnot, right? | 09:49 |
| Myrl-saki | Thansk so much. ^^ | 09:49 |
| lofty | Myrl-saki: no, because of whiteboxes (and because of delay information) | 09:50 |
| Myrl-saki | Ah | 09:50 |
| Myrl-saki | Because it actually knows more granular timings? | 09:50 |
| Myrl-saki | I read your post and abc works on unit delays? | 09:51 |
| lofty | yep | 09:51 |
| lofty | So a LUT8, a LUT4, and a LUT2 have equal delay :p | 09:51 |
| lofty | Obviously, given that a LUT2 can use the fastest inputs of a LUT4, and a LUT8 needs to go through a LUT4 and 4 layers of muxes | 09:52 |
| lofty | this isn't in the least bit realistic :p | 09:52 |
| Myrl-saki | Also, TIL about this: `Obviously, given that a LUT2 can use the fastest inputs of a LUT4` how does this work? I'm guessing it's decoder delay or something? Since LUT4s are basically 16-bit SRAMs, right? | 09:55 |
| lofty | They are, yes; where there's a mux tree to turn the 16 config bits into the 1 output bit | 09:57 |
| lofty | so the four inputs correspond to the four mux layers needed | 09:57 |
| lofty | and so the inputs will have differing propagation delay based on the number of mux layers that the signal has to go through | 09:57 |
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| Guest32 | hello, is there a way to read environment variables from a native yosys synth script, or is TCL the only way to go here? | 12:43 |
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| ZipCPU | Perhaps you can read environment variables from an embedded Python script? That would make sense. | 14:38 |
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| jleightcap | I have a circuit that's entirely combinational, and as I try to compile larger and larger versions, ABC takes a very long time | 20:26 |
| jleightcap | Is there any substitute that isn't as single-threaded? | 20:26 |
| jleightcap | I'm attempting `abc -fast` now, but without I stopped it after about 30 hours | 20:27 |
| jleightcap | Just `abc`, that is, so maybe `-fast` will be much better. Just waiting now. | 20:28 |
| lofty | jleightcap: no, presently not. | 21:42 |
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