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| Guest57 | hi people | 08:30 |
|---|---|---|
| Guest57 | i am getting error while executing make sky130A_pll in openfasoc, where i am trying to run my verilog file instead of pll.v | 08:32 |
| Guest57 | it is not taking my module name, can anyone suggest on this issue please? | 08:32 |
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| so-offish | I am not sure if the nextpnr gui is showing me that one of my nets is shorted (?) I need to read the config file to see if it's producing something reasonable. | 18:45 |
| so-offish | Is there a cheat sheet for understanding the config file and following arcs | 18:46 |
| gatecat | I'd be very impressed if you managed to make a short circuit and didn't just find a GUI bug, tbh (the GUI isn't really well used) | 20:53 |
| gatecat | if you find the tile that's the problem in the config file you can check there is only one arc onto the wire you think has a problem, that's all you need to check | 20:55 |
| gatecat | if you can provide me a reproducible design, copy of the generated .config file and a screenshot of the problem including the tile and wire names then I can have a look tomorrow, too | 20:56 |
| so-offish | gatecat: thank you I will check that. I'm seeing if I can get the code released (there's nothing special about it, just a process). | 20:59 |
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