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| sajattack | I'm wondering what would be the best way to create a userspace/cpu-accessible framebuffer with litepcie, to make sort of a rasterizer card or something like that. I have an acorn which probably doesn't have enough io to actually drive a display (and no baseboard), has anyone tried something like this? I'm not too familiar with pcie or wishbone for that matter. But curious how someone would approach this | 07:50 |
|---|---|---|
| sajattack | is there a way to just map a block of memory that both can share under linux? | 07:51 |
| tnt | sajattack: you can create a memory mapped without ( BAR ) that just exposes your VRAM. | 07:51 |
| tnt | s/without/window/ | 07:51 |
| sajattack | when you say vram, do you mean on the fpga or on my pc's gpu? | 07:52 |
| tnt | on the fpga | 07:52 |
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| sajattack | yeah so that's kind of what I was thinking, how does the memory mapping work? | 07:54 |
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| sajattack | https://github.com/enjoy-digital/litepcie/issues/34 | 07:59 |
| sajattack | using this example, is it just resource0 == the vram/dram? | 07:59 |
| tnt | yes you could map bar0 directly to your vram or some part of it. | 08:09 |
| tnt | you could also define another BAR | 08:09 |
| tnt | (BAR0 is usually used for mmio registers) | 08:10 |
| sajattack | cool | 08:11 |
| tnt | Although not sure if/how litepci supports multiple BAR. | 08:11 |
| tnt | Ok, it doesn't so you have to use bar0 (or a part of it). | 08:12 |
| tnt | Note that this won't exactly be fast ... | 08:13 |
| sajattack | I found this issue about a similar thing too https://github.com/enjoy-digital/litepcie/issues/54 | 08:15 |
| sajattack | haha brrrrr https://github.com/enjoy-digital/litepcie/pull/107 | 08:20 |
| sajattack | this looks like it's for cuda though | 08:22 |
| sajattack | yeah so I guess just do the 54 one and access the memory with the cpu one pixel at a time? | 08:25 |
| sajattack | or try to find a way to map it to the gpu 🤔 | 08:26 |
| tnt | I don't understand what you mean. If you expose some RAM on the FPGA through a BAR, yeah, the CPU will access it through PCIe one pixel at a time. | 08:51 |
| sajattack | nevermind | 08:51 |
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| whitequark[cis] | i think you could maybe use MTRRs to make it cacheable? | 08:58 |
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| sajattack | vivado keeps failing to download lol | 09:18 |
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| cr1901 | If you are a Tera Term user (Windows), and use LiteX, would you be willing to try this plugin? https://github.com/cr1901/teraterm-litex | 21:44 |
| cr1901 | It _does_ work for me, including the installers. But I don't have a second machine to try a "no dev env" install on. | 21:44 |
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