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| Lofty | agg: are you using "ABC" or "ABC9"? This sounds like a fundamental problem of logic optimisers called 'structural bias', where the optimiser is stuck in a local optimum due to the shape of the input netlist. ABC9 does a better job of solving this, in my experience. | 01:35 |
|---|---|---|
| agg | using abc9 | 01:38 |
| agg | Does sound like the sort of issue I'm getting, yea | 01:39 |
| agg | Is there any way to perturb it or permute the input in some way? seems like it would be amenable to at least trying a bunch of different starting conditions and from what I've seen would have a similar magnitude effect to nextpnr seeds | 01:46 |
| agg | But if it's a deterministic optimisation that just depends on the input it might be kinda hard to find semantically equivalent permutations, idk.. | 01:47 |
| Lofty | agg: people have toyed with that idea, sure, but it doesn't do much to resolve the fundamental problem | 01:51 |
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| Jay_jayjay | Anyone come across this error for synth_ice40? | 21:23 |
| Jay_jayjay | 2.49.15.3. Executing XAIGER backend. | 21:23 |
| Jay_jayjay | <suppressed ~433 debug messages> | 21:23 |
| Jay_jayjay | ERROR: Assert `!aig_map.count(bit)' failed in backends/aiger/xaiger.cc:435. | 21:23 |
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| Jay_jayjay | it seems that the XAIGER backend won't deal with logic loops... | 21:35 |
| gatecat | In theory earlier parts of the abc9 pass are supposed to break them | 21:38 |
| gatecat | But this must be failing for some reason (it's not the first time I've seen it fail this way tbh) | 21:38 |
| Jay_jayjay | Also, I need the logic loops intact | 21:38 |
| Jay_jayjay | I use `SB_LUT' instantiations for this purpose | 21:39 |
| Lofty | Jay_jayjay: logic loops are forbidden in Yosys. | 21:40 |
| Jay_jayjay | yes, i know | 21:40 |
| Jay_jayjay | you've mentioned this before | 21:40 |
| Jay_jayjay | however, I need this, and I don't have a alternative to yosys | 21:41 |
| Lofty | https://github.com/YosysHQ/yosys/issues/2530 <-- I've been doing my best to fix logic loop handling in ABC9 where possible | 21:41 |
| Lofty | If you absolutely do need that, break the loops manually with a black box cell | 21:42 |
| Jay_jayjay | I am using a black box cell | 21:42 |
| Jay_jayjay | ice40's built in SB_LUT | 21:42 |
| Lofty | No | 21:42 |
| Lofty | SB_LUT is whitebox | 21:42 |
| Lofty | Not blackbox | 21:42 |
| Jay_jayjay | what would blackbox do that whitebox wouldn't? | 21:43 |
| Lofty | Yosys can see into its contents, and see that you still have a logic loop | 21:43 |
| Lofty | Black boxes do not have any contents as far as Yosys is concerned | 21:43 |
| Jay_jayjay | how would I make sure that at the end of the day I have a SB_LUT? | 21:44 |
| Lofty | Use an SB_LUT and your own blackbox cell | 21:44 |
| Lofty | And then `techmap` out the blackbox cell | 21:44 |
| Lofty | You could also try the eddie/abc9_scc_fixes2 branch of Yosys, which has some fixes in this situation | 21:45 |
| Lofty | But as you can see, it's not enough by itself | 21:45 |
| Jay_jayjay | so I put a (*blackbox*) on my lut module | 21:46 |
| Jay_jayjay | and then... ? | 21:46 |
| Lofty | Use (* keep *) as well for good luck :P | 21:46 |
| Jay_jayjay | how would i use `techmap` to replace it with a SB_LUT? | 21:47 |
| Lofty | <Lofty> Use an SB_LUT and your own blackbox cell | 21:47 |
| Lofty | the "and" is important here | 21:47 |
| Jay_jayjay | ? | 21:48 |
| Lofty | https://gist.github.com/Ravenslofty/ca7d375b4f7296263995c97d70d5c177 <-- write your SB_LUT4 as before, but put the feedback path through a `loop_breaker` module | 21:49 |
| Jay_jayjay | oh, I see. | 21:49 |
| Lofty | And then after `synth_ice40 -abc9`, run `attrmap -remove blackbox t:loop_breaker; techmap -map loop_breaker.v`, and techmap will stitch the loops back together | 21:51 |
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| Jay_jayjay | Lofty: nextpnr still gives ERROR: cell type 'loop_breaker' is unsupported (instantiated as 'main.main.hlatch_i6.latch.genblk1[5].main.breaker') | 21:55 |
| Jay_jayjay | no yosys errors | 21:55 |
| Lofty | You didn't techmap it | 21:56 |
| Jay_jayjay | i see attrmap and techmap executed | 21:57 |
| Lofty | ...Okay, different approach | 21:57 |
| Jay_jayjay | could i just use a blackbox module with SB_LUT4 in it, then techmap it? | 21:57 |
| Lofty | I suspect the problem is that because it's marked blackbox in the source it's being ignored | 21:58 |
| Lofty | Thus a different approach | 21:58 |
| Lofty | https://gist.github.com/Ravenslofty/ca7d375b4f7296263995c97d70d5c177 <-- I renamed the pins of loop_breaker | 21:58 |
| Jay_jayjay | would that change anything? | 21:59 |
| Lofty | Please give me a moment >.> | 21:59 |
| Lofty | That means you can try `chtype -set $_BUF_ t:loop_breaker; opt` | 22:00 |
| Lofty | instead of the attrmap/techmap before | 22:01 |
| Jay_jayjay | Great, it works! | 22:06 |
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