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| pepijndevos[m] | That's an interesting observation. But could be said of simulated hdl too, so I think it's more about semantics. Vhdl doesn't have pointers for example ;) So it seems like you could design a language to be easy to optimise. What's interesting is that they are not functional languages, which have easy to reason about side effects too. | 05:04 |
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| corecode | they don't have any? | 06:33 |
| corecode | simple answer :) | 06:33 |
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| pepijndevos | Anyone wants to play a game of "why did the compiler delete my code?" haha | 08:54 |
| tnt | sure :) | 08:56 |
| pepijndevos | tnt, there you go https://paste.ubuntu.com/p/xZFtMnMdsm/ | 08:58 |
| tpb | Title: Ubuntu Pastebin (at paste.ubuntu.com) | 08:58 |
| pepijndevos | The problem is the input to the assert statement gets optimized to 1'1 | 08:58 |
| pepijndevos | (note the initial value on the dff) | 08:58 |
| pepijndevos | ($auto$ghdl.cc:290:import_module$4) | 08:59 |
| tnt | wtf is this ? | 09:00 |
| mwk | RTLIL I suppose | 09:01 |
| pepijndevos | original source: https://github.com/ghdl/ghdl/blob/master/testsuite/synth/psl01/hello.vhdl | 09:01 |
| tpb | Title: ghdl/hello.vhdl at master · ghdl/ghdl · GitHub (at github.com) | 09:01 |
| pepijndevos | But you'd have to do some... experimental things to get the RTLIL | 09:01 |
| pepijndevos | you can do `yosys -p show the.il` to see what's going on, except it does not show the initial value. | 09:02 |
| tnt | "assume always val < 50;" for a 4 bit number that looks redudant. | 09:04 |
| pepijndevos | yea, sure, this code was written to test that it parses correctly, not that it's a meaningful fromal verification hehe | 09:05 |
| tnt | how am I supposed to feed that to yosys ? because it chokes on it here ... | 09:10 |
| mwk | tnt: read_ilang | 09:11 |
| mwk | pepijndevos: I might not me reading this RTLIL entirely right, but it seems like "val < 50" was mutated to "val < 2" by chopping the constant 50 to 4 bits? | 09:12 |
| mwk | if you assume val < 2, proving "val /= 5 or rst == '1'" is rather easy | 09:12 |
| pepijndevos | ohhhh, is that what's happening?? Let me try without the assume | 09:13 |
| pepijndevos | mwk, nope, the assert still gets optimized away | 09:14 |
| pepijndevos | I'm now trying to find where in `prep` it happens... | 09:14 |
| pepijndevos | I see what's going on... | 09:18 |
| tnt | Well, dff23 is init to 2'b11 dff23[0] input is wired to ... dff23[0] & 1'b1 so obviously it's always going to stay at 1. | 09:19 |
| daveshah | `trace` is always fun for this kind of debugging | 09:19 |
| tnt | and if it's at 1 $auto$ghdl.cc:290:import_module$11 is 1 and so is the input to the assert. | 09:20 |
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| pepijndevos | oh wow | 09:22 |
| pepijndevos | I'm 100% sure this is a logic bug on the GHDL side... just not sure what the *correct* logic would be. | 09:24 |
| pepijndevos | So yea, basically the DFF is just looping on itsel and not connected in any way to the input. And then they get OR'ed together, and since the DFF is just always one, the OR is alway 1 | 09:25 |
| pepijndevos | I think the intended logic is something along the lines of "if the input is ok and the previous input was also ok" | 09:25 |
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