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| corecode | hm, something is putting charge into my nRESET line of the u4k | 13:52 |
|---|---|---|
| corecode | floats at 0.78V with a 10k pull down | 13:52 |
| corecode | i mean, it does reset | 13:52 |
| corecode | but that's a bit close for comfort | 13:52 |
| emeb | why would you have a pull-down? | 14:05 |
| corecode | so that it defaults to off | 14:05 |
| emeb | it's asserted low | 14:06 |
| corecode | but now i'm thinking i'd prefer it to default to on :) | 14:06 |
| emeb | pulling down would keep it in reset | 14:06 |
| corecode | yes, reset asserted = fpga off | 14:06 |
| emeb | hmm. guess I don't understand your goals then. | 14:07 |
| emeb | but datasheet indicates there are no internal pulls on that input so it's hard to say why a 10k pulldown wouldn't pull all the way. | 14:07 |
| corecode | yea maybe somebody else is leaking current into that pin | 14:08 |
| emeb | unless you've got a hardware fault - leaky connections/solder whisker/etc. | 14:08 |
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