Tuesday, 2019-06-04

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promach_Anyone have used or interested in https://www.design-reuse.com/news/46234/silvaco-si2-free-15nm-open-source-digital-cell-library.html ?15:29
tpbTitle: Silvaco and Si2 Release Unique, Free 15nm Open-Source Digital Cell Library (at www.design-reuse.com)15:29
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daveshah> The library is available to Si2 members and universities at no fee under the Apache-2.0 open source license agreement.15:49
daveshahNot sure that is really in the spirit of open source15:50
daveshah(although hopefully if it really is Apache-2 it will end up on GitHub etc)15:50
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sammylinIs there a way to translate a EDIF file to JSON for NextPNR?22:52
mwkjust use yosys22:52
mwkhm22:53
sammylinRight, i'm looking at the manual and there's no read_edif22:53
mwkwait, is edif output-only in yosys22:53
sammylinThat's what I'm seeing.22:53
mwknevermind then, sorry22:54
sammylinTrying to see if I can use Synplify Pro to synthesize from VHDL then use NextPNR to well... PNR22:54
mwkmaybe try going EDIF -> BLIF -> JSON?22:56
sammylinwhat do I use to go from EDIF to BLIF?22:57
sammylinhttp://www.eecg.toronto.edu/~jayar/software/edif2blif/edif2blif.html ?22:58
tpbTitle: Download edif2blif (at www.eecg.toronto.edu)22:58
mwkseems sort of cursed22:59
mwkbut worth a shot, maybe?22:59
sammylinHas anyone ever done this before?  Or am I walking down a dark path here?22:59
Laksenedif is pretty cursed23:00
sammylinGreat23:01
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