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| msd8121 | hey all, who should I contact for a review? | 06:30 |
|---|---|---|
| msd8121 | https://github.com/YosysHQ/yosys/pull/996 | 06:31 |
| tpb | Title: [mdaiter]: add ceil opts by mdaiter · Pull Request #996 · YosysHQ/yosys · GitHub (at github.com) | 06:31 |
| msd8121 | @thoughtpolice ? | 06:34 |
| msd8121 | exot | 06:35 |
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| msvisser | Hi, I’m working on a project doing FSM optimisations using Yosys. | 15:35 |
| msvisser | Using the default synth script with `fsm -expand -fullexpand` I can get Yosys to completely detect my FSMs, but they are often left with multiple output connections that are not connected to anything. | 15:35 |
| msvisser | These outputs all have a name starting with “$auto$rtlil.cc:1483:operator()$”. | 15:35 |
| msvisser | Is there an easy way I am overlooking to get rid of these outputs? | 15:35 |
| daveshah | Run clean or opt_clean might fix things. | 15:36 |
| msvisser | I am currently running opt_clean and fsm_opt after the expand step | 15:36 |
| msvisser | But these wires do not get removed | 15:36 |
| daveshah | Ah, these are outputs of a cell? Yosys connects unused outputs of a cell to autogenerated wires. | 15:37 |
| daveshah | This is just how Yosys represents unused outputs | 15:38 |
| msvisser | Okay, in the case of a FSM block is there a way to remove those outputs before transforming it back to logic? | 15:39 |
| daveshah | No, I don't think Yosys supports changing the set of ports on its internal cells. This is a sure way to cause an internal cell check error. | 15:41 |
| daveshah | As soon as the FSM block is converted to logic, I would expect opt_clean to remove the unused logic though | 15:42 |
| msvisser | The fsm_opt pass seems to already do some removal of unused outputs, although not this specific case | 15:44 |
| msvisser | Yeah after it is converted to logic the unused outputs get optimised away, but for my project it would be nice to have a FSM with only the required output bits | 15:45 |
| msvisser | It checks for a `\unused_bits` attribute on the output bits, although I do not know where that is set internally | 15:46 |
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