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| janrinze | ZipCPU: Apparently it's not possible to read the flash chip from the up5k on the upduino v2. attaching an extra flash chip to gpio worked, can be read. | 14:03 |
|---|---|---|
| ZipCPU | Wierd. Never would've expected that. | 14:03 |
| janrinze | ZipCPU: i mean the up5k cannot read the flash chip on the upduino v2 board | 14:03 |
| janrinze | yup.. very strange.. | 14:03 |
| ZipCPU | Still ... wouldn't have expected it ... at all | 14:04 |
| janrinze | possibly the ftdi chip holds one of the pins | 14:04 |
| ZipCPU | Indeed, I find that kind of surprising. Disappointing too. | 14:04 |
| ZipCPU | You should be able to see any FTDI interference on the schematic | 14:04 |
| janrinze | true, i have a bootloader that cpoies flash to spram. works on the eval board but not on the upduino. | 14:04 |
| janrinze | *copies | 14:05 |
| ZipCPU | Are you working with a CPU? Which one? | 14:05 |
| ZipCPU | (You had mentioned "bootloader" ....) | 14:05 |
| ZipCPU | (I guess "bootloader" could also mean an FPGA configuration that loads another configuration ....) | 14:06 |
| janrinze | yes, i have a 16 bit RISC. Designed it long time ago but now runs on up5k too | 14:06 |
| ZipCPU | So ... if you can't use the flash, how will you load it? | 14:06 |
| janrinze | thinking about modifying the bootloader to load from spi SDcard | 14:07 |
| ZipCPU | How much memory do you have to work with? | 14:07 |
| janrinze | on the eval board it properly loads the 128KB from the flash. | 14:07 |
| janrinze | up5k has 128KB spram. | 14:08 |
| ZipCPU | Ok .... that's better than the 8kB BRAM on the *x8ks | 14:08 |
| janrinze | unfortunately it's not possible to initialize it | 14:08 |
| janrinze | 8kB? i thought it was 16KB | 14:09 |
| ZipCPU | How will you read from the SD card without instructions? | 14:09 |
| ZipCPU | (It is 16kB, but .... little things here and there chip away at it, so that the best usable amount you'll end up with for a CPU is only ever 8kB) | 14:09 |
| janrinze | ZipCPU: exactly.. need to build a state machine for init and load the proper sectors to the memory | 14:10 |
| ZipCPU | Ever worked with an SD card before? | 14:10 |
| janrinze | in software over SPI .. 6502 :-) usually there are plenty sdcard libraries now so i never bothered re-doing it | 14:11 |
| ZipCPU | Sure, I get that, but the start up sequence for an SD card is rather intense | 14:12 |
| ZipCPU | Can I offer you an SD-card SPI simulator? | 14:12 |
| ZipCPU | (Works with Verilator ...) | 14:12 |
| janrinze | Sure. | 14:12 |
| ZipCPU | Check out https://github.com/ZipCPU/sdspi/blob/master/bench/cpp | 14:12 |
| tpb | Title: sdspi/bench/cpp at master · ZipCPU/sdspi · GitHub (at github.com) | 14:12 |
| janrinze | Old SDcards are very forgiving. so i tend to stick with the 256MB or 512MB ones. | 14:13 |
| janrinze | nice! | 14:13 |
| ZipCPU | There's also an SD-card SPI core in there as well, although .... I'm not sure it would fit your needs | 14:13 |
| ZipCPU | You're welcome to check it out if you would like | 14:13 |
| ZipCPU | It was one of my cores from before I started formally verifying things | 14:13 |
| ZipCPU | I'm not going to claim it's low logic at all either .... | 14:14 |
| janrinze | I think I will try to implement the conversion of the 6502 code to a state machine. Or I can put the bootloader as software in BRAM.. | 14:14 |
| ZipCPU | You can also find an example C-program that calls the controller and sets up the SD card here: https://github.com/ZipCPU/zbasic/blob/master/sw/board/sdtest.c | 14:14 |
| tpb | Title: zbasic/sdtest.c at master · ZipCPU/zbasic · GitHub (at github.com) | 14:14 |
| ZipCPU | Software in startup BRAM might work | 14:15 |
| ZipCPU | That might even be your best bet too | 14:15 |
| janrinze | true.. and just do sdcard bitbang in sw | 14:16 |
| ZipCPU | Looks like my own SD card S/W is way over bloated, coming in at about 64kB. I'm betting most of that is because it's using the C-library | 14:17 |
| janrinze | very possible. | 14:18 |
| ZipCPU | The "main" program itself is only about 4096kB, so that's starting to look a bit more realistic for something you might do. | 14:18 |
| tnt | janrinze: did you wake up the flash ? | 14:28 |
| tnt | janrinze: the ice40 issues a deep-sleep command to the flash after config is done by default. | 14:28 |
| ZipCPU | tnt: You'd think iceprog would know about that and wake it up thoguh | 14:30 |
| ZipCPU | *though | 14:30 |
| tnt | oh, when I read "s not possible to read the flash chip from the up5k", I thought it was about a spi core inside the fabric of the fpga once configured ... to initialize SPRAM for instance. | 14:31 |
| tnt | not anything to do with iceprog | 14:31 |
| ZipCPU | tnt: That was my first thought as well | 14:31 |
| janrinze | tnt: reading from the flash chip by the up5k might be hampered if deep sleep is issued. | 14:34 |
| tnt | well yeah ... it doesn't work ... | 14:34 |
| tnt | (unless the flash chip doesn't implement deepsleep) | 14:34 |
| janrinze | tnt: still does not explain why the eval board has no trouble to read from the flash | 14:35 |
| tnt | as I just said ... maybe the flash chip there doesn't implement deep sleep | 14:35 |
| janrinze | tnt: okay.. so what's a quick test here? | 14:36 |
| tnt | when converting from .asc to .bin with icepack you can use the -s option | 14:36 |
| janrinze | tnt: the flash chips are different on the two boards | 14:36 |
| tnt | this disables the final deep-sleep commands. | 14:37 |
| janrinze | tnt: Duh!.. works! | 14:44 |
| janrinze | tnt: silly me.. never thought of that.. | 14:44 |
| ZipCPU | Wow ... that makes things *much* easier, now, doesn't it? Thanks, tnt! | 14:45 |
| janrinze | So in simple terms, different flash chip that DOES support deep sleep. Nice. | 14:45 |
| ZipCPU | See ... that's the hard part about building any "universal" QSPI flash support ... the standard is anything bug | 14:47 |
| ZipCPU | *but | 14:47 |
| janrinze | tnt: super!! thanks! this has been bugging me for days. | 14:47 |
| tnt | janrinze: yeah, I got bit by that too ... I had to dig up the logic analyzer to see wtf was going on to finally find out that the deep sleep command was being issued :p | 14:51 |
| janrinze | ZipCPU: the demo I am building includes a BASIC interpreter. Can do GPIO from BASIC :-) Any SDcard over SPI in BASIC? ;-) | 14:52 |
| ZipCPU | Don't see why not, I just don't have any examples using BASIC | 14:52 |
| ZipCPU | Just thinking about it ... my controller responds to 32-bit words. That might not work in a 16-bit environment very well. (The sim should still work tho) | 14:53 |
| * cr1901_modern was the one who added the "-s" option to icepack | 14:54 | |
| cr1901_modern | so technically, I RE'd exactly one bit in Project Icestorm :D | 14:54 |
| cr1901_modern | :P | 14:54 |
| janrinze | cr1901_modern: thanks! would not have been able to fix this issue without it. | 14:54 |
| cr1901_modern | Yw :). I lost an interesting amount of time to the lack of deep sleep myself in late 2017 | 14:55 |
| janrinze | cr1901_modern: sounds awfully familiar.. | 14:56 |
| cr1901_modern | Nobody needed it then, and since clifford was at a conference I just dl'd icecube and did it myself... really, I just think it's funny that I RE'd one single bit :P | 14:56 |
| janrinze | cr1901_modern: it's not about the amount of bits but the added functionality it gives. Very good catch! | 14:57 |
| janrinze | am i the only one who tries to hit tab for word completion when typing at IRC? :-) | 14:58 |
| ZipCPU | Maybe. I certainly don't use any word completion | 15:03 |
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