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jcreus | hi! quick question. If I want to make sure than a pin is high impedance, is it enough to declare it in the .pcf file with set_io, then in the top .v block, declare "input pin;" | 02:22 |
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jcreus | it seems like they default to pullup per https://stackoverflow.com/questions/45884007/icestorm-do-pins-not-specified-in-the-pcf-stay-high-impedance | 02:22 |
tpb | Title: yosys - (icestorm) do pins not specified in the pcf stay high impedance - Stack Overflow (at stackoverflow.com) | 02:22 |
jcreus | thanks :) | 02:23 |
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* ZipCPU ponders the question | 02:27 | |
ZipCPU | Why not control the pin explicitly with an SB_IO primitive? | 02:27 |
ZipCPU | I think the documentation of that primitive describes how they get set up. | 02:28 |
jcreus | gotcha, I'll try that. Thanks! | 02:29 |
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promach_ | Have anyone faced non-penultimate timestep evaluation issue during multiclock induction ? https://i.imgur.com/yro5GnM.png | 16:22 |
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ZipCPU | promach: That's the same issue we discussed before. | 18:36 |
ZipCPU | Isn't it? | 18:36 |
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ZipCPU | promach: You haven't showed your code in the image. A quick look through your code indicates that data_reg will be set to all ones any time enable is false, transmit is in progress, and all bits have been transmitted. | 18:49 |
ZipCPU | It's not the fact that the assertion is failing which is your problem. The problem is that your code is buggy. | 18:49 |
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