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| promach_ | Can SymbiYosys support wildcard files selection yet ? | 01:38 |
|---|---|---|
| promach_ | and does Yosys support any automated bug insertion (mutation) methodology ? | 01:52 |
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| gyroninja | Hi, I'm having trouble synthesizing a design I've made. It removes all the cells during optimization leaving me with 0 cells total in the end. This is likely me to either using yosys wrong or verilog wrong as I'm a newbie at both. I've created a small test program which exhibits the behaviour I'm talking about: https://hastebin.com/tiwiwiqagi.v If I use use verilator to simulate the design, it seems to work | 05:45 |
| gyroninja | fine (the data output is toggled). | 05:45 |
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| gyroninja | I've also tried on both version 0.7 and the latest from git | 05:47 |
| ravenexp | data is not a reg | 05:51 |
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| ravenexp | you can't parallel assign a value to a wire | 05:52 |
| gyroninja | thanks | 05:52 |
| ZipCPU | You might also wish to look into the "show" command. It works great on small designs to illustrate a logic flaw, but ... can be difficult to use with really large designs. | 05:57 |
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| promach_ | Why do I have this error https://paste.ubuntu.com/p/vDM57Qgsmt/ when I try the code at http://www.clifford.at/papers/2017/smtbmc-sby/slides.pdf#page=25 ? note that I have installed avy | 16:36 |
| tpb | Title: Ubuntu Pastebin (at paste.ubuntu.com) | 16:36 |
| daveshah | promach_: what happens when you type just avy at the shell? | 17:07 |
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| promach_ | daveshah: it seems like I did not install it properly | 17:13 |
| promach_ | let me do the installation of extavy again tomorrow | 17:14 |
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| gyroninja | After messing around with it for a while, I still haven't been able to figure out what I did wrong. I tried declaring my output as reg and switching = and <= around, but it didn't help. I did notice that if it seems to work fine if I use an if statement / conditional operator to set my output instead of from an array. https://hastebin.com/erohufariv.v <- Is my broken code that doesn't generate any cells. If | 20:13 |
| gyroninja | you uncomment the commented line and comment the one below it, it seems to work. | 20:13 |
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| gyroninja | Also here's the BLIF files that both outputed https://hastebin.com/teyigasoba | 20:25 |
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| ZipCPU | gyroninja: Start at the top again ... what are you tring to do? | 21:08 |
| ZipCPU | *trying | 21:08 |
| ZipCPU | Looking over your code, I noticed you declared an array of one element: reg [0:0] array[2]; | 21:09 |
| ZipCPU | Did you mean to do that, or were you trying to do: reg [0:0] array [0:1]; ... an array of two elements? | 21:09 |
| ZipCPU | Also, as a matter of general practice, most synthesizers don't recognize arrays from block RAM elements if anything else is with them within their always statements. | 21:10 |
| ZipCPU | Hence, I think you wanted: always @(posedge clock) data <= array[index]; always @(posedge clock) index <= !index; | 21:11 |
| ZipCPU | I just implemented a multiply algorithm to implement https://en.wikipedia.org/wiki/Binary_multiplier#More_advanced_approach:_signed_integers | 21:12 |
| tpb | Title: Binary multiplier - Wikipedia (at en.wikipedia.org) | 21:12 |
| ZipCPU | A very strange algorithm to debug. I think I misread the description incorrectly several times over. | 21:13 |
| * ZipCPU now has it working through an exhaustive simulation via verilator. | 21:13 | |
| gyroninja | ZipCPU: I want to essentially look up a value from the array | 21:14 |
| gyroninja | and assign it to the output | 21:14 |
| ZipCPU | Yeah, you have your array declared incorrectly. | 21:14 |
| gyroninja | Isn't it an array of 2 elements though? | 21:14 |
| gyroninja | of 1 bit each | 21:14 |
| ZipCPU | Not if you declare it as: reg [0:0] array [2]; | 21:14 |
| ZipCPU | You need to declare an array of two one-bit elements as: reg [0:0] array [0:1]; | 21:15 |
| gyroninja | Doing it the way I've been doing it works fine with Verilator | 21:16 |
| gyroninja | but yet doing it your way makes it generate cells | 21:17 |
| gyroninja | and fixes the problem | 21:17 |
| ZipCPU | Ahm ... I doubt it was really working with Verilator. | 21:19 |
| gyroninja | It was though | 21:19 |
| ZipCPU | If you dig into code like that, you'll often find Verilator reading from unallocated memory | 21:19 |
| ZipCPU | Where it gets really bad is when you try to write to that memory, and then overwrite something on your stack or something | 21:19 |
| gyroninja | Well something to point out is that it at least recognized it as an array | 21:20 |
| ZipCPU | Absolutely! You told it that it was an array of one element. | 21:20 |
| gyroninja | If I tried to assign into an element beyond the second element it would warn me and not compile | 21:20 |
| ZipCPU | Then, you initialized two elements that weren't in the array. | 21:21 |
| gyroninja | If I declare it with [2] and try to assign to array[2] the warning I get from verilator is: "%Warning-SELRANGE: test.v:13: Selection index out of range: 2 outside 1:0" | 21:23 |
| gyroninja | Notice how it seems to be interpreting the 2 as 1:0 for me | 21:23 |
| ZipCPU | Fascinating. | 21:23 |
| ZipCPU | Not quite what I was expecting--what does the C++ generated code look like? Should be easy enough to interpret. | 21:24 |
| gyroninja | Vtest.cpp: https://hastebin.com/ginuyohica.cpp Vtest.h: https://hastebin.com/ikiborunoy.h | 21:27 |
| ZipCPU | Check out lines 73-83 of Vtest.cpp for discussion | 21:28 |
| ZipCPU | That's what's implementing this logic ... if I've read it right (and I'm trying to read quickly) | 21:29 |
| gyroninja | okay | 21:29 |
| ZipCPU | The index is anded with one to create the new index, but it is also referencing the array like that as you suggested. | 21:30 |
| ZipCPU | Looks like that might be a bug in Verilator. | 21:30 |
| ZipCPU | Verilator *should've* taken the index, subtracted two from it, anded it with 0, and then used the result to look up the array value | 21:31 |
| gyroninja | I'm not following | 21:33 |
| gyroninja | If you anded it with 0 wouldn't it always be 0? | 21:34 |
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| gyroninja | It seems to be valid syntax regardless | 22:09 |
| gyroninja | I checked the BNF and it seemed to check out | 22:10 |
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