Friday, 2018-05-18

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awygledaveshah: ubuntu still segfaults and arch is a bummer05:29
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daveshahawygle: can you check the core dump and get a stack trace (might have to rebuild as Debug)?05:55
awygledaveshah: it can't find a libboost-python symbol05:55
daveshahWhat happens if you run the tests inside libtrellis/tests?05:55
awyglei will do that tho, hang on05:55
daveshahawygle: OK, I see05:55
daveshahtests won't run then either05:55
daveshahCan you post your modified CMake file?05:56
awyglehttps://gist.github.com/awygle/60b40d69bf217e12289061d47ccc7d8e dis05:58
tpbTitle: gist:60b40d69bf217e12289061d47ccc7d8e · GitHub (at gist.github.com)05:58
awygle"ImportError: /usr/lib/x86_64-linux-gnu/libboost_python-py35.so.1.62.0: undefined symbol: PyUnicode_AsUTF8String"05:59
awygle(from the tests, i got a different symbol from trying to run a real thing)05:59
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awyglehm maybe i should downgrade06:00
daveshahCan you post python --version?06:00
awygle2.7.14 and 3.6.306:01
awygleso that's probably not idea06:01
awyglel06:01
daveshah2.7.14 won't work06:01
daveshah3.6.3 should06:01
daveshahBut linking with 3.5 seems wrong then06:02
awygleyeah idk what i was doing here06:04
daveshahCan you put 3.6 after Python Libs?06:05
daveshah*PythonLibs?06:05
daveshahAnd possibly PythonInterp06:06
daveshahMy best guess is that the default Python on Ubuntu is 2.7, and that breaks stuff06:07
daveshahDidn't realise that was still the case, living inside an Arch bubble...06:07
awyglehm so it's not finding the 3.6 lib or interp for some reason06:08
awyglethey're there, but libpython3.6 is libpython3.6m for some reason, idk if that matters06:08
daveshahMaybe you need libpython3.6-dev?06:09
daveshahHmm, not sure how that ended up bold06:09
awyglei have that06:10
awyglederp. i had to nuke my cmake stuff apparently.06:11
daveshahAnd python3-dev?06:12
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daveshahAh, that makes sense06:12
awyglewell only kind of lol. it was picking up needing 3.6 but somehow not realizing that meant it had to go look again.06:13
daveshahYep, it caches dependency checks06:13
daveshahNow I see why mithro is using conda in symbiflow-arch-defs06:14
awyglebtw are you building from a build/ directory with cmake ../ or in libtrellis?06:15
daveshahTBH I'm just building in libtrellis06:15
daveshahBut could be worth adding a command to copy the library at the end so out of tree builds can be done too06:16
awygleoh this looks like fun. "dynamic module does not define init function".06:18
daveshahWhat PyInit is it looking for?06:20
mithrodaveshah: lol :-P06:21
awygle"initpytrellis"06:21
daveshahAh, stupid me06:22
daveshahChange python in run_all.sh to python306:23
awygleahh yes06:23
awygleokay passed! sweeeeet06:23
daveshahSweeeet06:23
daveshahI think 90% of the issues were Python 2/3 related, and should be fairly fixable06:24
daveshahBut the CMake will now need a bit of work to not require one exact version06:24
awygleyup06:24
awyglealso, devices.json should be in database/ according to the fuzzer script06:26
daveshahDatabase should be a clone of prjtrellis-db, as in prjxray06:27
awygleah06:27
daveshahThere will be scripts to do that, and also create it from scratch06:27
daveshahYou will also need to create skeleton database files using create_empty_bitdbs06:28
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aninditaHi, we are facing an issue with Yosys synthesis. We have a 4-bits state register. After synthesis, somehow we get 12-bits state register. On simulating gate-level synthesized file, we also see that this register does get reset to binary 12'b0 but to 12'b1. Any clues to what may be happening? Thanks.06:39
daveshahanindita: if you have a fsm pass in your script, then yosys may recode the FSM to one-hot06:43
daveshahWhich is what is happening here06:43
daveshahEither pass -norecode to fsm, or set fsm_encoding to binary06:44
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dmin7hi, quick question: is that a pure SPI slave implementation? https://github.com/cliffordwolf/icotools/blob/master/icosoc/mod_spi/mod_spi.v11:09
tpbTitle: icotools/mod_spi.v at master · cliffordwolf/icotools · GitHub (at github.com)11:10
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dmin7(it does seem to write spi_sclk (and also CS when asked to), so i guess it shouldn't do that as a slave x)11:11
dmin7s/slave/master in the question*11:12
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daveshahdmin7: it's a pure master11:34
daveshahit has no wiring to read the clock even11:34
dmin7yes, thx for confirming (: .. looking at other SPI slaves, i think i might be able to write myself one of those :)11:36
* dmin7 or hope so at least11:36
daveshahdmin7: SPI slave is not too bad if you just need a simple custom application11:37
daveshaha generic SPI slave for all applications would be harderr11:37
dmin7(actually, i'ld rather use it as master, but it seems there is no "hardware" SPI slave on the pi :/)11:37
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keesjhttps://hackaday.com/2018/05/18/arduino-just-introduced-an-fpga-board-announces-debugging-and-better-software/19:09
tpbTitle: Arduino Just Introduced an FPGA Board, Announces Debugging and Better Software | Hackaday (at hackaday.com)19:09
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shaprlooks like an Intel Cyclone 1020:22
qu1j0t3yeah i think Max 10 .. the product page is better than this article20:22
qu1j0t3no prices yet20:22
qu1j0t3but looks pretty nice20:22
shapr10CLO16 if the LUT count is right20:23
shaprqu1j0t3: what's Max 10?20:23
qu1j0t3shapr: https://store.arduino.cc/arduino-vidor-4000  hm, weird, i thought it was named here.20:25
tpbTitle: Arduino Vidor 4000 (at store.arduino.cc)20:25
qu1j0t3but i don't see it now20:25
qu1j0t3eh well ignore me, i don't know where i read that it was a Max 10. seems it is actually a Cyclone.20:28
shaprqu1j0t3: I just magnified the chip on the board until I could read the text21:29
shaprcouldn't find any other info21:29
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qu1j0t3shapr: ah ok!21:30
qu1j0t3some releases use the word Cyclone so i'm sure you're right21:30
awygleprobably the second least free fpga21:44
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