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| CarlFK | hi | 00:31 |
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| cr1901_modern | mithro: I tried a "VexRiscv-Lite" I created on tinyfpgab... as is par for the course, I don't get any activity, even w/ _florent_'s minimal soc | 01:02 |
| cr1901_modern | Time to simulate I guess... | 01:05 |
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| _florent_ | cr1901_modern: what's your "VexRiscv-Lite"? is it a specific vexrsicv verilog you generated to reduce resource usage? If you share it, i'll do some tests | 05:44 |
| cr1901_modern | _florent_: It can be found here on this branch: https://github.com/cr1901/VexRiscv-verilog/tree/lite | 05:53 |
| tpb | Title: GitHub - cr1901/VexRiscv-verilog at lite (at github.com) | 05:53 |
| cr1901_modern | And yes, it's a variant explicitly to reduce resource usage | 05:53 |
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| cr1901_modern | I'm not ready to share the SoC it's part of though; you'll need to reduce the integrated_rom_size of your tinyfpga-soc to 0x1800 for all the block RAM to fit | 05:54 |
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| _florent_ | cr1901_modern: thanks, have you been able to test it on another board (a Xilinx one?) | 06:06 |
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| cr1901_modern | _florent_: No, not yet | 06:16 |
| _florent_ | cr1901_modern: if you want an easy way to test configurations, you can use the simulation: in litex/boards/targets, run ./sim.py --cpu-type=vexriscv | 06:46 |
| _florent_ | cr1901_modern: and you replace the VexRiscv.v in litex/soc/cores/cpu/vexriscv/verilog with your generated file | 06:46 |
| _florent_ | cr1901_modern: the VexRiscv-Lite.v is working in simulation | 06:47 |
| _florent_ | cr1901_modern: i'm going to test in arty | 06:47 |
| _florent_ | cr1901_modern: it's working on arty. | 06:51 |
| ewen | mithro: Appears we can upgrade FuPy to modern micropython: | 06:55 |
| ewen | Executing booted program at 0x40000000 | 06:55 |
| ewen | MicroPython v1.9.4-509-gf4e8a40-dirty on 2018-08-27; litex with lm32 | 06:55 |
| ewen | >>> | 06:55 |
| ewen | mithro: or if we just pull forward rather than rebase | 06:58 |
| ewen | Executing booted program at 0x40000000 | 06:58 |
| ewen | MicroPython v1.9.4-513-gc6fb8fc-dirty on 2018-08-27; litex with lm32 | 06:58 |
| ewen | FTR, key trick to getting v1.9.4-... version numbers is that we must grab the v1.9.4 tag from the upstream and push it up to our repo. | 06:58 |
| ewen | (otherwise git describe will report v1.8.7-NNNN-.... with a huge number of commits, which is rather misleading.) | 06:59 |
| ewen | mithro: pull forward is probably better, which is currently only at https://github.com/ewenmcneill/fupy-micropython/tree/ports-fupy | 07:05 |
| tpb | Title: GitHub - ewenmcneill/fupy-micropython at ports-fupy (at github.com) | 07:05 |
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| xobs | In case anyone is following along at home, I managed to port Coriolis to run on Ubuntu 18.04, including porting it to Python3. I still can't /do/ anything with it yet, since I'm trying to figure out how to get yosys to synthesize something it'll accept. https://github.com/xobs/coriolis | 07:27 |
| tpb | Title: GitHub - xobs/coriolis: An alternative PnR system, or at least an attempt to modernize it. (at github.com) | 07:27 |
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| twoolie | I have the LM32 booting on TinyFPGA-BX with _florent_'s tinySOC | 07:36 |
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| ewen | mithro: third_party/edid-decode is causing me pain trying to push to my own repo, even after cherry-picking the URL change from your branch, "git submodule sync", "git submodule update --recursive". | 07:50 |
| ewen | The following submodule paths contain changes that can | 07:50 |
| ewen | not be found on any remote: | 07:50 |
| ewen | third_party/edid-decode | 07:50 |
| ewen | mithro: is there some step I'm missing in how to make it happy again? | 07:50 |
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| ewen | mithro: Finally fixed my thirdparty/edid-decode issue by (a) cherry-picking your submodules update (as well as the edid-decode git repo location change) *and* (b) rm -rf .git/modules/third_party/edid-decode third_party/edid-decode && git s | 08:49 |
| ewen | ubmodule sync && git submodule update --init --recursive | 08:49 |
| ewen | (all one command: ie ... && git submodule sync && git submodule update --init --recursive) | 08:49 |
| ewen | It appears edid-decode managed to diverge the git trees after moving locations, just to make it extra specially difficult. | 08:49 |
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| ewen | FTR, https://github.com/timvideos/litex-buildenv/pull/36 has a cherry-pick of the two submodule updates from #34, in case we can merge them separately from everything else. | 09:21 |
| tpb | Title: WIP: Update third party submodules (including edid-decode) by ewenmcneill · Pull Request #36 · timvideos/litex-buildenv · GitHub (at github.com) | 09:22 |
| ewen | Plus a note of what needs to be done when merging/pulling that to get thirdparty/edid-decode back to a sane state. | 09:22 |
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| mithro | ewen: poke _florent_ about that error with the MimasV2 | 10:30 |
| mithro | ewen: it looks like an issue in LiteDRAM - https://github.com/timvideos/litex-buildenv/pull/36#issuecomment-416166619 | 10:32 |
| tpb | Title: WIP: Update third party submodules (including edid-decode) by ewenmcneill · Pull Request #36 · timvideos/litex-buildenv · GitHub (at github.com) | 10:32 |
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| ewen | _florent_: After updating litex modules in litex-buildenv (with the updates mithro had), building litex-buildenv on Mimas V2 breaks, very early in the build, in make.py. | 11:26 |
| ewen | _florent_: Output of build attempt is in https://github.com/timvideos/litex-buildenv/pull/36#issuecomment-416166619 | 11:26 |
| tpb | Title: WIP: Update third party submodules (including edid-decode) by ewenmcneill · Pull Request #36 · timvideos/litex-buildenv · GitHub (at github.com) | 11:26 |
| ewen | _florent_: Do you have any ideas of root cause (appears something is not defined, but I'm unclear why). Builds okay on the Arty platform. | 11:26 |
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| _florent_ | mithro, ewen: i'm looking at that | 12:03 |
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| cr1901_modern | _florent_: At this point, I'm wondering if icetime is lying about all the cores (lm32, vexriscv) passing timing | 16:58 |
| daveshah | It will do that if they have any negative edge clocks | 17:02 |
| CarlFK | daveshah: what version did you flash opsis? you just did this, right? | 17:05 |
| daveshah | Nope | 17:05 |
| daveshah | Never used an opsis in my life | 17:05 |
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| CarlFK | ah different D. | 20:58 |
| CarlFK | deeprave: what firmware version did you flash? | 20:59 |
| mithro | https://docs.google.com/drawings/d/1jgZfjZrPeNBQF3MnC9fQBh__4_v7ceEV8OanxutZCpE/edit | 22:48 |
| tpb | Title: LiteX Build Environment - FuPy - Relationship - Google Drawings (at docs.google.com) | 22:48 |
| cr1901_modern | What is Zephyr? | 22:50 |
| mithro | cr1901_modern: The IoT platform you use when you really wanted Linux but couldn't make it small enough | 22:51 |
| cr1901_modern | Well I never wanted to use Linux on IoT, so... | 22:51 |
| cr1901_modern | I guess maybe Zephyr is for me? | 22:51 |
| mithro | cr1901_modern: Zephyr is backed by the Linux Foundation | 23:04 |
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| CarlFK | mithro: can you look into why there aren't any hdmi2usb builds in so long? | 23:31 |
| CarlFK | also, I have a PR against download-prebuilt-firmware.py - was just banging on it in the last day or so. | 23:32 |
| CarlFK | reloacint to PS1 for nerp night with pdp11 - see ya | 23:41 |
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