Wednesday, 2018-06-06

*** tpb has joined #timvideos00:00
*** CarlFK has joined #timvideos00:19
*** ChanServ sets mode: +v CarlFK00:19
cr1901_modern_florent_: I was able to finally get working serial port output. Idk what I was doing wrong this whole time, but its whatever now lol01:54
cr1901_modernimportant thing is it's now fixed and I have a "known-to-work" base01:54
*** sb0 has quit IRC02:29
*** sb0 has joined #timvideos02:48
*** rohitksingh_work has joined #timvideos03:32
*** CarlFK has quit IRC05:04
*** Kamilion has quit IRC05:28
cr1901_modernmithro: I did a post-synthesis simulation of tinyfpga; incredibly, it matches pre-synthesis simulation. Meaning I guess the bug appears during par or later. This is a nasty bug05:29
*** Kamilion has joined #timvideos05:29
cr1901_modernActually no I lied... post-synthesis doesn't match, but it doesn't fail where I expect it to05:35
*** CarlFK has joined #timvideos06:05
*** ChanServ sets mode: +v CarlFK06:05
*** swalladge_ has joined #timvideos06:19
*** swalladge_ has quit IRC07:13
*** swalladge_ has joined #timvideos07:16
*** sb0 has quit IRC07:47
*** Elwell_ is now known as Elwell09:04
*** sb0 has joined #timvideos10:43
*** sb0 has quit IRC12:23
*** rohitksingh_work has quit IRC12:40
*** Elwell_ has joined #timvideos14:12
*** Elwell has quit IRC14:14
*** Elwell_ is now known as Elwell14:14
*** sb0 has joined #timvideos14:19
*** rohitksingh has joined #timvideos15:10
*** jea has quit IRC16:17
*** jea has joined #timvideos16:18
*** sb0 has quit IRC16:32
*** rohitksingh1 has joined #timvideos17:17
*** rohitksingh has quit IRC17:19
*** rohitksingh1 has quit IRC18:57
*** Elwell has quit IRC19:11
*** f15h has joined #timvideos19:26
*** f15h has quit IRC19:35
*** waldo323 has quit IRC22:30
*** waldo323 has joined #timvideos22:30
*** shorne has quit IRC22:43
*** shorne has joined #timvideos22:56
*** Elwell has joined #timvideos23:46
*** Elwell_ has joined #timvideos23:57
*** Elwell has quit IRC23:59

Generated by irclog2html.py 2.13.1 by Marius Gedminas - find it at mg.pov.lt!