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CarlFK[m] | anyone up for helping me get my Atlys to flash? | 00:13 |
---|---|---|
CarlFK[m] | im getting DNA = 110000001100000011000000110000001100000010011110000001010 (0x181818181813c0a) | 00:13 |
CarlFK[m] | this is almost DNA = 110000001100000011000000110000001100000011000000110000001 (0x181818181818181) | 00:14 |
CarlFK[m] | http://paste.ubuntu.com/p/qTpMKpXnJW/ output from juser@cnt3:~/temp$ hdmi2usb-mode-switch -v --flash-image image-gateware+bios+firmware.v0.0.4-157-ga112978.atlys.hdmi2usb.lm32.bin | 00:16 |
tpb | Title: Ubuntu Pastebin (at paste.ubuntu.com) | 00:16 |
mithro | cr1901_modern: https://www.crowdsupply.com/teardown/portland-2018 | 00:20 |
tpb | Title: Teardown: Portland 2018 | Crowd Supply (at www.crowdsupply.com) | 00:21 |
cr1901_modern | Immortalized in legends and lore for generations to come?! :o | 00:38 |
cr1901_modern | mithro: https://github.com/fupy/issues-wiki/issues/9#issuecomment-369774792 Do you have any idea what's wrong? Sounds like the Makefile needs work, but I don't have time to check right now | 00:38 |
tpb | Title: Micropython and Arty S7 support · Issue #9 · fupy/issues-wiki · GitHub (at github.com) | 00:38 |
mithro | cr1901_modern: It's probably been fixed if we just push a new litex-buildenv there? | 00:39 |
cr1901_modern | What does litex-buildenv have to do w/ fupy | 00:40 |
mithro | cr1901_modern: fupy is just another user of it | 00:42 |
mithro | https://github.com/timvideos/litex-buildenv/blob/master/scripts/build-micropython.sh | 00:43 |
tpb | Title: litex-buildenv/build-micropython.sh at master · timvideos/litex-buildenv · GitHub (at github.com) | 00:43 |
mithro | have to run | 00:43 |
cr1901_modern | I see | 00:45 |
cr1901_modern | mithro: I'd like to get the litex version used by litex-buildenv bumped tonight, but I need a stopgap solution to the path problems. Personally I think we should just remove the "-Ob toolchain_path /opt/Xilinx" from settings.sh for now | 00:46 |
cr1901_modern | or reluctantly, perhaps the change in litex.build causing the issues should be reverted if HDMI2USB/litex-buildenv hard-depend on the path behavior | 00:57 |
cr1901_modern | mithro: This is none of my business, but I'll ask anyway. Why do you star your own repos? | 01:17 |
Joelw | It's like how buskers always put some of their own money in the hat! :) | 01:23 |
thaytan | and that way, you get notifications if someone hacks your account and starts committing code | 02:58 |
thaytan | win win | 02:58 |
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froztbyte | that altera avdb looks so cool | 11:30 |
* froztbyte is busy scratching on the site | 11:36 | |
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CarlFK1 | how do I fit 240M Mar 2 01:30 initrd.img-4.13.0-rc1+ on on a 220M /boot partition? | 13:03 |
thaytan | CarlFK1, unpack it and remove some stuff? | 13:28 |
thaytan | :) | 13:28 |
CarlFK1 | lol - not the worst answer | 13:29 |
CarlFK1 | CONFIG_DEBUG_INFO=y <-that!! | 13:29 |
CarlFK1 | I don't need that. | 13:29 |
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CarlFK[m] | 19M Mar 2 08:31 boot/initrd.img-4.13.0-rc1+ | 14:36 |
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CarlFK1 | yipee!!! Linux cnt6 4.13.0-rc1+ #5 SMP Fri Mar 2 08:14:45 CST 2018 x86_64 GNU/Linux | 14:40 |
thaytan | CarlFK[m], wow, that got tiny | 14:53 |
CarlFK[m] | thaytan (IRC): it is about what I get from a kernel debian package | 14:58 |
thaytan | yes, it's a much more normal size | 14:59 |
CarlFK[m] | so 19 is normal, 240 is HUGE!!! | 14:59 |
thaytan | that's what you get for rolling in a giant H.264 boot-screen video ;) | 14:59 |
* thaytan imagines it's a giant animation of the work CARL!!! zooming towards you, as the voice booms it from your speakers and fireworks go off | 15:00 | |
CarlFK1 | but it was awesome! | 15:00 |
CarlFK[m] | now to figure out how to get the Atlys to talk to me | 15:13 |
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CarlFK1 | felix - are you the Felix that was helping us test the vizzini driver t | 15:39 |
CarlFK1 | [ 515.089627] usbcore: registered new interface driver vizzini | 15:40 |
CarlFK1 | [ 515.089633] usbserial: USB Serial support registered for vizzini_1410 | 15:40 |
CarlFK1 | I have that, but im not sure how to get the Atlys up and running so I have some clue if it is working or not | 15:41 |
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CarlFK[m] | woot! hooked up a different atlys, it works. | 16:16 |
CarlFK[m] | platform: atlys | 16:17 |
CarlFK[m] | git describe: v0.0.4-144-gd11f5b8 | 16:17 |
felix_ | CarlFK[m]: yep, i'm that felix | 16:17 |
felix_ | i'm currently in berlin though and don't have the atlys with me right now | 16:17 |
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* CarlFK[m] sent a long message: CarlFK[m]_2018-03-02_17:18:29.txt <https://matrix.org/_matrix/media/v1/download/matrix.org/zmMgMfnECOofMScDvQOhWULK> | 17:21 | |
CarlFK[m] | I have an lcd and the Atlys input1 hooked to it's own output1. why no EDID? | 17:22 |
CarlFK[m] | output0: [email protected] from pattern (underflows: 0) | 17:22 |
CarlFK[m] | output1: [email protected] from pattern (underflows: 0) | 17:22 |
CarlFK[m] | pattern is displaying on the lcd | 17:22 |
cr1901_modern | _florent_: https://hastebin.com/yefawetofo.rb This is what I get for testing bitslip on the arty s7 | 17:33 |
cr1901_modern | Based on these results, I should choose a bitslip of 3, delay of 17? | 17:33 |
cr1901_modern | or 16* | 17:33 |
cr1901_modern | mithro/_florent_: Pretty confident the litex port for arty_s7 works properly, including DDR. The A7 PHY was reusable. | 18:11 |
_florent_ | cr1901_modern: good! (yes bitslip of 3 / delay of 16 or 17 will be fine) | 18:16 |
mithro | cr1901_modern: \o/ | 18:18 |
mithro | _florent_: Any chance you could take a quick look at CarlFK[m]'s EDID issue? My current guess is that it got broken with changes to support Bunnie | 18:19 |
cr1901_modern | _florent_: For now I instructed the person actually porting arty_s7 to litex_buildenv to use 14. | 18:19 |
cr1901_modern | Should we alias S7 PHY to A7 PHY? | 18:19 |
_florent_ | cr1901_modern: why using 14 that is clearly not the middle of the sampling window? | 18:20 |
cr1901_modern | _florent_: B/c I'm an idiot | 18:21 |
mithro | CarlFK[m]: Can you see if the edid is broken on the Atlys as well as the Opsis? It sounds like it is? | 18:21 |
CarlFK[m] | mithro (IRC): I am getting different edid stuff on the Atlys - im a little lost about what I am looking at | 18:22 |
_florent_ | cr1901_modern: it will probably work, but you should use the middle of the window, more change to get reliable results between fpga boards/builds | 18:23 |
cr1901_modern | _florent_: Right, updated my comment to tell the porter to use 17 | 18:23 |
CarlFK[m] | Opsis saw FF FF FF edid and reported it bad - Atlys says "input0 port has no EDID capabilities" | 18:23 |
CarlFK[m] | mithro (IRC): which Joel is the Joel I need to bug about the vizzini code? (it seems to be working) | 18:25 |
cr1901_modern | _florent_: https://github.com/fupy/issues-wiki/issues/9#issuecomment-370001549 | 18:26 |
tpb | Title: Micropython and Arty S7 support · Issue #9 · fupy/issues-wiki · GitHub (at github.com) | 18:26 |
cr1901_modern | Notice the bold :P | 18:26 |
felix_ | CarlFK[m]: shenki | 18:28 |
_florent_ | mithro: indeed, edid was broken, should be fixed now | 18:32 |
cr1901_modern | _florent_: https://github.com/enjoy-digital/litex/pull/66 | 18:40 |
tpb | Title: boards/arty_s7: Fix IOStandard on System Clock. by cr1901 · Pull Request #66 · enjoy-digital/litex · GitHub (at github.com) | 18:40 |
CarlFK[m] | mithro (IRC): confirmed. Atlys input0 hooked to Opsis output1, on Opsis: H2U 00:07:44>d edid output1 FF... Checksum ERROR in EDID block 0 | 18:42 |
cr1901_modern | Looks like I spoke too soon :( https://imgur.com/5shYaFy | 18:47 |
tpb | Title: Imgur: The magic of the Internet (at imgur.com) | 18:47 |
cr1901_modern | _florent_: How should I go about debugging this? These are the changes I made: https://github.com/cr1901/arty-soc/tree/arty_s7 | 18:54 |
tpb | Title: GitHub - cr1901/arty-soc at arty_s7 (at github.com) | 18:54 |
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CarlFK[m] | mithro (IRC): what is expected or desired when nothing is plugged in and I do H2U 00:38:25>d edid output0 | 19:14 |
CarlFK[m] | I suspect I am getting the last edid from when something was pluged in. but its hard to keep track when I don't know if something is really sending FFs or if it is having trouble reading | 19:16 |
cr1901_modern | Very curiously, manuel's repo works just fine. Hmmm... https://github.com/mhanuel26/litex-buildenv | 19:46 |
tpb | Title: GitHub - mhanuel26/litex-buildenv: An environment for building LiteX based FPGA designs. Makes it easy to get everything you need! (at github.com) | 19:46 |
cr1901_modern | (i.e. the memtest passes) | 19:46 |
cr1901_modern | wonder what I did wrong | 19:46 |
CarlFK[m] | H2U 04:09:24>dvisampler1: IDELAY busy timeout (%hx %hx %hx) | 19:59 |
CarlFK[m] | thats prolly not right ;) | 19:59 |
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_florent_ | cr1901_modern: your error is here: https://github.com/cr1901/arty-soc/blob/arty_s7/arty_base.py#L169 | 21:44 |
tpb | Title: arty-soc/arty_base.py at arty_s7 · cr1901/arty-soc · GitHub (at github.com) | 21:44 |
_florent_ | cr1901_modern: it should be https://github.com/mhanuel26/litex-buildenv/blob/master/targets/arty/base.py#L159 | 21:44 |
tpb | Title: litex-buildenv/base.py at master · mhanuel26/litex-buildenv · GitHub (at github.com) | 21:44 |
cr1901_modern | _florent_: Tyvm. Will try after dinner. Why is the constant different for arty-soc? | 22:21 |
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CarlFK1 | felix_: do you know what should be done next about getting this code merged into upstream kernel mainline source tree whatever? ? | 22:27 |
CarlFK1 | shenki: ping ping - I have this working: 4.13.0-rc1+ [ 515.089627] usbcore: registered new interface driver vizzini | 22:29 |
CarlFK1 | shenki: I build this: I have a tree with my patch atop Bens here: https://github.com/shenki/linux/tree/vizzini | 22:30 |
tpb | Title: GitHub - shenki/linux at vizzini (at github.com) | 22:30 |
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felix_ | CarlFK1: i have never tried upstream any linux driver | 23:26 |
CarlFK1 | felix_: didn't you want to learn or be involved? | 23:27 |
felix_ | https://github.com/shenki/linux/tree/vizzini-4.13 would have been the right branch | 23:27 |
tpb | Title: GitHub - shenki/linux at vizzini-4.13 (at github.com) | 23:27 |
felix_ | yep. but somehow we didn't get around to actually do that at lca | 23:28 |
CarlFK1 | most patches don't happen at lca ;) | 23:28 |
felix_ | hehe | 23:28 |
CarlFK1 | wow! 46,598 commits behind torvalds:master | 23:30 |
CarlFK1 | any idea how update my local copy with just that branch? | 23:30 |
CarlFK1 | I am afraid the whole repo will take hours to download | 23:31 |
tumbleweed | git checkout master, git pull | 23:34 |
CarlFK1 | why master? | 23:36 |
tumbleweed | you wanted to update your local copy to that branch | 23:36 |
tumbleweed | that branch != master ? | 23:37 |
CarlFK1 | vizzini-4.13 <- that branch | 23:37 |
tumbleweed | ok | 23:37 |
tumbleweed | git fetch | 23:37 |
tumbleweed | git checkout vizzini-4.13 | 23:37 |
tumbleweed | git rebase master | 23:37 |
tumbleweed | sorry, git rebase origin/master (because you didn't update your master) | 23:37 |
CarlFK1 | juser@cnt6:/srv/video/tv/linux$ git checkout vizzini-4.13 | 23:37 |
CarlFK1 | error: pathspec 'vizzini-4.13' did not match any file(s) known to git. | 23:37 |
tumbleweed | do you have shenki's repo as a remote? | 23:38 |
CarlFK1 | juser@cnt6:/srv/video/tv/linux$ git remote -v | 23:38 |
CarlFK1 | originhttps://github.com/shenki/linux.git (fetch) | 23:38 |
CarlFK1 | originhttps://github.com/shenki/linux.git (push) | 23:38 |
tpb | Title: GitHub - shenki/linux: Linux kernel source tree (at github.com) | 23:38 |
tpb | Title: GitHub - shenki/linux: Linux kernel source tree (at github.com) | 23:38 |
tumbleweed | git checkout shenki/vizzini-4.13 -b vizzini-4.13 | 23:39 |
tumbleweed | err origin/ | 23:39 |
CarlFK1 | git checkout origin/vizzini-4.13 -b vizzini-4.13 ? | 23:39 |
tumbleweed | yeah | 23:39 |
CarlFK1 | k - it is thinking about it very hard... | 23:39 |
CarlFK1 | or ignoring me. | 23:39 |
CarlFK1 | Switched to a new branch 'vizzini-4.13' | 23:40 |
CarlFK1 | woot. | 23:40 |
CarlFK1 | in make menuconfig, how do I jump to something that is a few pages down> | 23:43 |
CarlFK1 | Device Drivers ---> | 23:43 |
CarlFK1 | now I want to get to [*] USB support ---> | 23:43 |
CarlFK1 | and have to search each page for "usb" | 23:44 |
CarlFK1 | and now serial, which i sometimes miss | 23:44 |
CarlFK1 | maybe because I get distracted by USB Gadget Support | 23:45 |
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