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| tumbleweed | CarlFK: atlys + C2 layout: https://www.dropbox.com/sc/epbnn1zfsjhsdke/AAB3XpTiipVa_j9_lq40PRuBa | 05:46 |
|---|---|---|
| CarlFK | tumbleweed: huh. using the existing holes? I don't remember finding a way the C2 would mount cleanly like that. | 06:34 |
| tumbleweed | CarlFK: it's not perfect | 06:48 |
| tumbleweed | if I wasn't using plastic standoffs, there'd be too much strain | 06:48 |
| CarlFK | ah got it. | 07:06 |
| CarlFK | too bad they didn't make the holes the same pattern as HDs | 07:06 |
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| mithro | tumbleweed: got some more pictures of that? | 09:29 |
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| mithro | xfxf: https://opencast.jira.com/wiki/display/LECTURESIGHT/LectureSight+Project+Home | 10:52 |
| tpb | Title: LectureSight Project Home - LectureSight - Opencast Projects Wiki (at opencast.jira.com) | 10:52 |
| xfxf | interesting | 10:56 |
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| tumbleweed | mithro: grabbed some more pics. https://www.dropbox.com/sc/pdc2gx6c62sddit/AADDCy8zGdFam56DnrbG_Lgla | 14:19 |
| tumbleweed | and that's all your getting, becuase I'm on a plane now | 14:19 |
| tumbleweed | CarlFK: ^^ | 14:19 |
| CarlFK | tumbleweed: thanks - have a safe flight | 14:34 |
| mithro | cr1901_modern1: I'm around for a bit now if you have any questions | 14:40 |
| cr1901_modern1 | mithro: To be very specific, this enables Windows builds using *some* variants of msys. There are really too many versions of msys and git to keep track of for a "one-size fits all solution". | 14:46 |
| cr1901_modern1 | sys.platform returns cygwin, and cygwin should be just fine using the previously existing code. | 14:46 |
| cr1901_modern1 | git actually works properly from a command prompt w/o bash, but it really wants POSIXy paths, and Windows Python doesn't. So I use a command to convert instead of creating a crappy version of my own :) | 14:47 |
| mithro | cr1901_modern1: How did you install "windows Python"? conda? | 14:49 |
| cr1901_modern1 | mithro: msys2 package | 14:49 |
| mithro | cr1901_modern1: It would be good if we used conda on Windows too | 14:49 |
| cr1901_modern1 | mithro: See the question I asked in #m-labs b/c I forgot sb0 also frequents this room lol | 14:51 |
| cr1901_modern1 | mithro: It should be doable. The complication is that some minimal subset of POSIX tools need to be provided so neither MiSoC/LiteX nor the HDMI2USB build bomb, and path-handling is one place where "patching a Windows build" could be different depending on which project you obtained your POSIXy tools from | 14:53 |
| cr1901_modern1 | Basically, I took the "works on my machine" approach for now :P, b/c MSYS2 is one of the more common ways to get your daily recommended dose of POSIX tools | 14:54 |
| mithro | cr1901_modern1: Okay | 15:10 |
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| cr1901_modern | mithro: Do me a favor when you're awake, and build mimasv2_base_lm32, and then read me timing errors in top.par | 21:24 |
| mithro | cr1901_modern: ? | 21:25 |
| cr1901_modern | Or if anyone else is awake/running on Linux, could they checkout nextgen of HDMI2USB-litex-firmware and do the same? | 21:25 |
| cr1901_modern | mithro: There's a timing violation in the PAR step | 21:26 |
| mithro | cr1901_modern: I don't remember seeing any... | 21:27 |
| cr1901_modern | It's not caught on my machine b/c I never made a pull request to fix this bug in LiteX ( _florent_: patch incoming in a bit). But on a Linux machine, the script should've terminated | 21:28 |
| cr1901_modern | So if your script ran to completion, then there was no violation | 21:29 |
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| cr1901_modern1 | Jesus f***ing christ, took me 4.5 minutes to reconnect | 21:37 |
| mithro | hrm, looks like there is one | 21:37 |
| mithro | cr1901_modern1: it definitely didn't terminate for me.... | 21:37 |
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| mithro | WARNING:Par:468 - Your design did not meet timing. The following are some suggestions to assist you to meet timing in your design. | 21:38 |
| cr1901_modern | mithro: I don't know if lowering the system clock will fix it. But I think it's a good start | 21:38 |
| cr1901_modern | mithro: Could you run par by itself and check the return code? | 21:39 |
| mithro | Probably can't do 83MHz with a grade -2 part | 21:39 |
| cr1901_modern | Since all the files are there already, running par again should be idempotent. I just want to check if it errors out | 21:40 |
| mithro | cr1901_modern: I'm pretty sure its not idempotent | 21:41 |
| cr1901_modern | ahhh, well this is important bug to fix :P | 21:41 |
| cr1901_modern | the bash script has "set -e" at the top. That should've stopped processing if one of the commands errors out | 21:42 |
| cr1901_modern | This is telling me that the design DIDN'T meet timing, and yet the script kept running anyway | 21:42 |
| mithro | cr1901_modern: pushed a change to drop the CPU frequency, meets timing with that | 21:45 |
| cr1901_modern | mithro: Will check after dinner | 21:47 |
| cr1901_modern | I'm sure Xilinx ISE can do this, but haven't figured it out; I want to know which path is failing | 21:48 |
| mithro | cr1901_modern: btw - I noticed this | 21:56 |
| mithro | cr1901_modern: WARNING:Par:288 - The signal spiflash_miso_IBUF has no load. PAR will not attempt to route this signal. | 21:56 |
| mithro | cr1901_modern: It was the sys_clk route which was failing | 21:57 |
| mithro | cr1901_modern: See the table | 21:57 |
| mithro | https://www.irccloud.com/pastebin/gueyTS64/ | 21:57 |
| tpb | Title: Snippet | IRCCloud (at www.irccloud.com) | 21:57 |
| cr1901_modern | That's interesting... I wonder if that same warning's in the scope version | 22:00 |
| cr1901_modern | ahhh, looks like 399 regs had setup violations. I mean, that's fixable. | 22:02 |
| cr1901_modern | We could prob delay crg_unbuf_sys by some fraction of a cycle to satisfy setup times | 22:03 |
| cr1901_modern | if 83MHz operation is important | 22:03 |
| mithro | cr1901_modern: It's not really, we use a 50MHz lm32 on the Opsis | 22:04 |
| mithro | cr1901_modern: the par tool is returning 0 | 22:04 |
| cr1901_modern | Great :D! (re: the par) | 22:08 |
| cr1901_modern | And really? 50MHz? I thought LX45 would give plenty of space so 100MHz was doable | 22:08 |
| cr1901_modern | not that it matters | 22:09 |
| mithro | cr1901_modern: It's a problem with the 1:4 sdram | 22:16 |
| cr1901_modern | I'm guessing _florent_ came up with the timing for the mimasv2? | 22:19 |
| cr1901_modern | mithro: With your new change, the DDR RAM's being run at 200MHz instead of 333MHz. Is that a problem? | 22:19 |
| * cr1901_modern will find out soon enough... | 22:20 | |
| mithro | cr1901_modern: hrm - true I guess... | 22:25 |
| cr1901_modern | mithro: In any case, slowing it down didn't fix the output. So I'll need to take a look at that "will not be PAR'ed" input | 22:30 |
| cr1901_modern | It doesn't make sense that the scope target works when the CPU doesn't... | 22:30 |
| mithro | cr1901_modern: if you have another uart, attach it to the pins and have both the bridge and cpu going at once? | 22:35 |
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| mithro | cr1901_modern: is XIL_TIMING_ALLOW_IMPOSSIBLE set? | 22:40 |
| cr1901_modern1 | mithro: Not sure | 22:41 |
| cr1901_modern1 | mithro: No. I've never set that env variable | 22:42 |
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| mithro | Well, I'm heading to bed I think | 23:15 |
| cr1901_modern1 | mithro: Night. I'll keep working on it | 23:35 |
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