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mithro | mparuszewski: ping? | 03:06 |
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mithro | ayush3504: ping? | 03:17 |
mparuszewski | mithro: pong | 03:21 |
ayush3504 | mithro: pong | 03:21 |
ayush3504 | mithro: just updated header pinouts to be PMOD UART Type 4/ 4A compatible (commit e9f3a) | 03:22 |
mithro | ayush3504: going to chat with mparuszewski first | 03:22 |
mithro | ayush3504: then I want to talk about the PMOD stuff a little | 03:22 |
ayush3504 | mithro: sure | 03:22 |
mithro | ayush3504: have you finished the schematic stuff from last night? and started the PCB layouts? | 03:23 |
mithro | mparuszewski: so, techman is out for the next 2 weeks - I assume he mentioned that to you? | 03:23 |
mithro | mparuszewski: so I was wondering how things are going, how soon can we deploy something? etc | 03:24 |
mparuszewski | mithro: yes, I talked with him about it yesterday :) | 03:24 |
ayush3504 | mithro: had dinner after you left, went to bed, did the pmod changes after waking up this morning | 03:24 |
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mparuszewski | getting started page is ready to deploy I think, it has prose.io support and easy edit interface | 03:25 |
mithro | mparuszewski: okay, can we organise a time to sit down and do a review? | 03:27 |
mparuszewski | Yes of course. Tomorrow unfortunately I will be sitting in the car and driving for 20-24 hours (I will be in Croatia for 2 weeks), I have there Internet connection so it wouldn't be a problem to talk and do review :) | 03:28 |
mparuszewski | Unfortunately we can't use gh-pages branch to let GitHub generate the page, but I think we can add a hook, so after commit there will be message to generate.timvideos.us or Travis CI that there was a change and page should be rendered. | 03:32 |
mithro | mparuszewski: That was always the plan, no? | 03:32 |
mparuszewski | Yes, that was always the plan, but since we set that getting-started will be only a static page and need now custom generation I thought that we could use GitHub to generate, but still we have some small plugins and GitHub is very strict about it. | 03:34 |
mithro | mparuszewski: yeah | 03:37 |
mithro | mparuszewski: if the plugins are very useful, then maybe we should petition for them to get included in the default github pages generation stuff | 03:37 |
mithro | mparuszewski: so, would the weekend coming up be good? | 03:38 |
mparuszewski | Maybe, I will check it, remove unneeded plugins and see what plugins do we need. Yes of course, weekend would be good. | 03:39 |
ayush3504 | mithro: brb 20 min | 03:48 |
mithro | mparuszewski: I'm just checking my calendar | 03:49 |
mithro | mparuszewski: I could probably do Friday night, Saturday morning or Sunday night | 03:50 |
mparuszewski | In your time, right? :) | 03:50 |
mithro | yeah | 03:50 |
mithro | that would be Friday morning, Friday night and Sunday morning I think? | 03:51 |
mithro | (for you?) | 03:51 |
mparuszewski | Yes | 03:51 |
mparuszewski | Choose date that fits you best, I will available all day :) | 03:52 |
mithro | I think Friday night my time is probably best? | 03:53 |
mithro | what is your timezone again? | 03:53 |
mparuszewski | Warsaw/Berlin, CEST, GMT+2h :) | 03:54 |
mparuszewski | Friday morning also fits me, what hour would you like to meet? | 03:55 |
mithro | http://www.timeanddate.com/worldclock/meetingtime.html?iso=20140704&p1=240&p2=262 | 03:58 |
tpb | Title: The World Clock Meeting Planner - Results (at www.timeanddate.com) | 03:58 |
mithro | http://www.timeanddate.com/worldclock/meetingdetails.html?year=2014&month=7&day=4&hour=9&min=0&sec=0&p1=240&p2=262 | 03:59 |
tpb | Title: The World Clock Meeting Planner - Details (at www.timeanddate.com) | 03:59 |
mithro | ? | 03:59 |
mparuszewski | Great, I've added it to my calendar :) | 04:01 |
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mparuszewski | I need to pack to Croatia, I will be tomorrow online, bye guys. :) | 04:21 |
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mithro | okay | 04:23 |
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mithro | ayush3504: ping? | 05:07 |
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mithro | shenki: is the DDR fast enough to continually stream 720p@60Hz frames into the memory while reading the frames out at 30Hz? | 06:37 |
mithro | shenki: it might have high latency, but it also has pretty high bandwidth right? | 06:40 |
ayush3504 | mithro: back | 06:40 |
mithro | ayush3504: So did you see the PMOD spreadsheet I did? | 06:41 |
ayush3504 | mithro: yes | 06:41 |
mithro | So, I'm not sure how that all maps to your connector | 06:42 |
ayush3504 | mithro: https://www.dropbox.com/s/d9cyn66c7w48yt9/type%204%20compatible%20pinout.png | 06:42 |
tpb | Title: Dropbox - type 4 compatible pinout.png (at www.dropbox.com) | 06:42 |
ayush3504 | mithro: compatible with type 4 and 4A | 06:42 |
mithro | ayush3504: I think your connector should be a PMOD+i2c interface + Pmod Interface Type 4A (expanded UART) / double width Pmod Interface Type 1 (GPIO) ? | 06:43 |
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ayush3504 | mithro: if you populate headers on pin 1-6 , 15-20, only it becomes PMOD compatible | 06:45 |
mithro | so it seems there are 2 parts of PMOD, a i2c interface which is totally different and designed to be daisy chained, and then what I thought as PMOD, the 12 pin connector? | 06:46 |
mithro | took me a little bit to figure that one out | 06:46 |
ayush3504 | mithro: i think all the pinouts are for different use-cases of 6 pin /12 pin headers. I chose the 12pin type 4/4A | 06:47 |
shenki | mithro: you can't read and write at the same time | 06:48 |
ayush3504 | mithro: the pinouts given in spreadheet | 06:48 |
shenki | mithro: the way the system currently works is to write an enitre frame to ddr, and then start encoding | 06:48 |
shenki | mithro: while encoding, it will drop frames | 06:48 |
mithro | shenki: but you can interleave reading and writing ops? Or is there a switching direction costs? | 06:53 |
mithro | ayush3504: the 12 pin PMOD connector has a bunch of "interfaces" right (see one of the sheets in that spreadsheet) | 06:55 |
mithro | ayush3504: but there is a totally separate spec for PMOD I2C with even a different connector | 06:55 |
mithro | shenki: you write/read x bytes at a time (x =16bit = 2 bytes) right? | 06:56 |
shenki | mithro: yeah, the next thing to work on is to be kicking off the encoding whenever you get enough data to feed it | 06:57 |
shenki | instead of just when a frame is done | 06:57 |
shenki | so every 16 lines of picture you can start encoding | 06:57 |
shenki | tija: hey | 06:57 |
mithro | shenki: I'm just talking generally about DDR at the moment, we can chat about HDMI2USB implementation shortly :) | 06:58 |
mithro | shenki: so it looks like with the DDR interface there is basically a queue of "operations" that the controller reads from and executes? | 06:59 |
ayush3504 | mithro: yes, I made it according to 4 and 4A type. Are there any changes that you suggest? | 06:59 |
mithro | Hrm, no Rohit yet.... | 07:00 |
shenki | mithro: right, so no, i doubt you'd be doing 16 bit accesses | 07:00 |
mithro | Single byte accesses? | 07:00 |
shenki | mithro: ddr as an interface is 64bits | 07:01 |
shenki | but we shoudln't talk about ddr, we should talk about the interface that our controller exposes to the fpga | 07:01 |
shenki | coz that's what we care about | 07:01 |
shenki | in that case, the normal width is 32 bits | 07:01 |
shenki | but you can usually do a burst transaction of 64 bits | 07:01 |
mithro | 128Mbyte DDR2 16-bit wide data | 07:02 |
mithro | shenki: I'm trying to understand how DDR controller works and hence what is going on and then what the interface is mapping to? | 07:02 |
mithro | 64bit = 48bit address + 16bit data? Or? | 07:04 |
mithro | I'm probably horribly confused about all this :P | 07:05 |
mithro | be back in an hour, meeting with ayush3504 and rohit | 07:14 |
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mithro | hey rohitksingh | 07:24 |
rohitksingh | mihtro: Hi! Sorry!, was caught in sleeping..Is the VC started? | 07:25 |
rohitksingh | *mithro: Hi! Sorry!, was caught in sleeping..Is the VC started? | 07:25 |
mithro | rohitksingh: yes, please join | 07:28 |
rohitksingh | okay. great! | 07:28 |
mithro | rohitksingh: http://www.fpga4fun.com/PongGame.html | 08:23 |
tpb | Title: fpga4fun.com - Pong Game (at www.fpga4fun.com) | 08:23 |
mithro | http://www.xess.com/blog/a-simple-vga-interface-for-the-xula-fpga-board/ | 08:23 |
tpb | Title: A Simple VGA Interface for the XuLA FPGA Board | XESS Corp. (at www.xess.com) | 08:23 |
mithro | http://hamsterworks.co.nz/mediawiki/index.php/FPGA_VGA | 08:24 |
tpb | Title: FPGA VGA - Hamsterworks Wiki! (at hamsterworks.co.nz) | 08:24 |
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mithro | http://www.xilinx.com/support/documentation/application_notes/xapp523-lvds-4x-asynchronous-oversampling.pdf | 08:26 |
mithro | http://www.xilinx.com/support/documentation/application_notes/xapp250.pdf | 08:27 |
mithro | http://www.fpga4fun.com/CrossClockDomain.html | 08:29 |
tpb | Title: fpga4fun.com - Crossing clock domains (at www.fpga4fun.com) | 08:29 |
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mithro | 6:26 PM <•mithro> http://www.xilinx.com/support/documentation/application_notes/xapp523-lvds-4x-asynchronous-oversampling.pdf | 08:30 |
mithro | 6:27 PM <•mithro> http://www.xilinx.com/support/documentation/application_notes/xapp250.pdf | 08:30 |
mithro | 6:29 PM <•mithro> http://www.fpga4fun.com/CrossClockDomain.html | 08:30 |
tpb | Title: fpga4fun.com - Crossing clock domains (at www.fpga4fun.com) | 08:30 |
rohitksingh | mithro: browser crash! the latest firefox is very unstable...I'm back | 08:32 |
rohitksingh | mithro: I think I lost you on chat | 08:46 |
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CARAM_ | mithro: possible we can go over my new 'pusher' when you have time? | 18:30 |
CARAM_ | or maybe better to go over with CarlFK | 18:31 |
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