| *** tpb has joined #timvideos | 00:00 | |
| aps-sids | mparuszewski: is it possible to set some sort of markers to regenerate only the new posts? I know this is how Jekyll works, but regenerating thousands of posts of a 5 year old blog is not wise. | 00:02 |
|---|---|---|
| *** CarlFK has joined #timvideos | 00:17 | |
| *** ChanServ sets mode: +v CarlFK | 00:17 | |
| *** CarlFK has quit IRC | 00:27 | |
| *** rohitksingh1 has joined #timvideos | 01:03 | |
| *** rohitksingh has quit IRC | 01:04 | |
| *** rohitksingh1 has quit IRC | 01:07 | |
| *** CarlFK has joined #timvideos | 01:33 | |
| *** ChanServ sets mode: +v CarlFK | 01:33 | |
| mithro | morning people? | 01:37 |
| mithro | ayush3504: ping? | 01:37 |
| mithro | tariq786: ping? | 01:37 |
| ayush3504 | mithro: good morning | 01:38 |
| mithro | shenki / Joelw: ping? | 02:28 |
| shenki | mithro: yo | 02:29 |
| mithro | shenki: so Rohit needs some help with interfacing the VGA capture chip with the FPGA | 02:30 |
| shenki | mithro: k | 02:30 |
| shenki | what's the issue? | 02:30 |
| mithro | shenki: I believe the clocking in of data and dealing with skew | 02:31 |
| mithro | he has a lot of info on his blog post | 02:31 |
| shenki | ok | 02:31 |
| * shenki reads | 02:31 | |
| Joelw | mithro: Hi! | 02:31 |
| mithro | Joelw: you could probably help here too | 02:32 |
| *** tija_ has joined #timvideos | 02:33 | |
| shenki | mithro: hrm, which blog post? | 02:34 |
| Joelw | Probably this one? https://docs.google.com/document/d/11dfCeLtNUrjcst97REtgqLIln-_pKwHgGT3xKjOamxs/edit#heading=h.m6zkv3g74xht | 02:34 |
| tpb | Title: vMod-VGA: Current Status and Road Blocks - Google Docs (at docs.google.com) | 02:34 |
| Joelw | http://planet.timvideos.us/gsoc-2014-hdmi2usb/2014/06/28/gsoc-daily-log-cleanup/ | 02:34 |
| tpb | Title: TimVideos.us Planet - Developers News (at planet.timvideos.us) | 02:34 |
| mithro | http://dreamsxtrinsic.blogspot.com.au/2014/06/gsoc-daily-log-drivers-and-pll.html <-- I think that is the first one to start on | 02:34 |
| tpb | Title: [GSoC Daily Log]: Drivers and PLL | Dreams eXtrinsic (at dreamsxtrinsic.blogspot.com.au) | 02:34 |
| shenki | right, i read that | 02:35 |
| *** tija has joined #timvideos | 02:35 | |
| mithro | the following blog posts talk about things he's tried | 02:35 |
| shenki | ah, the google doc is good. thanks Joelw | 02:35 |
| mithro | he's capture the summary at the doc Joelw linked | 02:36 |
| Joelw | Hmm.. constraints might help? Doesn't look like the timing relationship between R/G/B and the clock is defined? Though oversampling and trying to detect the eye dynamically would get around that. | 02:40 |
| mithro | one big problem is he doesn't have any scope access it seems | 02:48 |
| Joelw | A scope may or may not help! :) You'd probably want a high bandwidth one with a large sample memory so that you can dump an entire line into a file and compare what it sees and what the FPGA thought it got | 02:52 |
| Joelw | Though the 24-bit VGA signals probably aren't that high bandwidth | 02:53 |
| mithro | yeah, I suggested he start with doing a very low resolution like 320x240 | 02:53 |
| Joelw | So yeah! A reasonable scope would be good. He doesn't have access to one at his university? | 02:53 |
| Joelw | When I was doing something like that at uni I borrowed a 4-channel 1GHz monster | 02:54 |
| *** CarlFK has quit IRC | 03:02 | |
| *** CarlFK has joined #timvideos | 03:03 | |
| *** ChanServ sets mode: +v CarlFK | 03:03 | |
| *** loadstar91 has left #timvideos | 03:23 | |
| aps-sids | mithro: I'm unable to find faac-encoder component in timvideos' flumotion repo. Is it from some other repo? | 03:30 |
| aps-sids | mithro: gst-flv-muxer also | 03:33 |
| aps-sids | x264-encoder, faac-muxer, lamemp3-muxer as well | 03:41 |
| mithro | aps-sids: There are multiple flumotion repos referenced from that. Check the submodules. | 05:16 |
| ayush3504 | mithro: so, we were discussing about no. of slots to have? | 05:59 |
| mithro | ayush3504: so, we have a limit of 6 slots by the number of pins in the VHDCI | 06:02 |
| ayush3504 | mithro: yes | 06:02 |
| mithro | ayush3504: we also have a bunch of mechanical restrictions if we want to fit it in 1ru racks | 06:03 |
| mithro | right? | 06:04 |
| mithro | From https://docs.google.com/spreadsheets/d/1lOAKj-r80o0KVlB-AP-42tiUY0Hg50EkQTgRwYNMilk/edit#gid=2041047356 | 06:04 |
| tpb | Title: Serial expansion board and daughterboard design - Google Tabellen (at docs.google.com) | 06:04 |
| ayush3504 | mithro: yeah i have that open | 06:05 |
| ayush3504 | mithro: 1 rack unit is 482mm right? | 06:05 |
| mithro | what does Wikipedia say? | 06:06 |
| ayush3504 | mithro: wikipedia says it's a unit of height for 19", 23" racks | 06:06 |
| ayush3504 | mithro: http://en.wikipedia.org/wiki/Rack_unit | 06:06 |
| tpb | Title: Rack unit - Wikipedia, the free encyclopedia (at en.wikipedia.org) | 06:06 |
| mithro | ayush3504: I don't see any reason not to trust wikipedia | 06:10 |
| ayush3504 | mithro: so we're considering 19" 482mm racks right? | 06:11 |
| mithro | A front panel or filler panel in a rack is not an exact multiple of 1.75 inches (44.45 mm). To allow space between adjacent rack-mounted components, a panel is 1⁄32 inch (0.031 inch or 0.79 mm) less in height than the full number of rack units would imply. Thus, a 1U front panel would be 1.719 inches (43.66 mm) high. If n is number of rack units, the | 06:11 |
| mithro | formula for panel height is h = (1.750n − 0.031) inch = (44.45n − 0.79) mm. | 06:11 |
| mithro | that is what wikipedia says, so I think we should follow that? | 06:12 |
| ayush3504 | yeah | 06:13 |
| *** slomo has joined #timvideos | 06:13 | |
| *** slomo has joined #timvideos | 06:13 | |
| ayush3504 | the height doesn't seem to be related to no. of slots. the daughterboards should fit nicely into that height. | 06:14 |
| mithro | okay | 06:23 |
| mithro | we also care about the width right | 06:23 |
| mithro | There are a couple of ways I could see this mounted | 06:23 |
| mithro | a) The board and the Atlys side-by-side in a single case | 06:24 |
| mithro | The two choices for the "width" of the (a) case is the "A/V half rack" width and the full 19 inch width. | 06:25 |
| mithro | b) The board is mounted in it's own case. The Atlys is mounted in it's own case. A VHDCI cable is run between the two cases. | 06:25 |
| mithro | Again the widths of the (b) cases should be based on the "A/V half rack" width and the full 19 inch width. | 06:25 |
| mithro | right? | 06:25 |
| ayush3504 | mithro: ok, how expensive is a VHDCI cable? | 06:31 |
| Joelw | I think I got one on eBay a few years ago for about $40 | 06:31 |
| ayush3504 | that looks expensive for running low speed signals | 06:33 |
| Joelw | Yeah, and the cables are pretty fat and un-bendable. If you only wanted low speed, you could build a breakout that converts it to a 40 pin IDC header or something | 06:35 |
| ayush3504 | yeah, but even that turns out to be >20$ with each connector around 10$. right? | 06:36 |
| Joelw | Pretty much, yeah! | 06:36 |
| ayush3504 | for option b) i would suggest connecting the box just through the USB on PIC18F we're planning to have included. | 06:36 |
| Joelw | Though if you were going to use low speed, your second board could just be a 40 pin IDC, so you'd only need one VHDCI | 06:36 |
| ayush3504 | Joelw: yeah, that's better | 06:37 |
| Joelw | If it was a one-off, you could just unsolder the VHDCI connector and solder on a ribbon cable! :) | 06:38 |
| ayush3504 | on the atlys? | 06:38 |
| Joelw | Yep! I probably wouldn't want to butcher mine up like that though. | 06:38 |
| ayush3504 | yes, i was going to say that too :P | 06:39 |
| mithro | ayush3504: we can probably make our own crappy low speed VHDCI cable | 06:39 |
| ayush3504 | mithro: why does it have to go through the HDMI2USB if it's in a separate box? | 06:40 |
| mithro | ayush3504: it doesn't *have* to, but it would be good to keep the option open to do so | 06:40 |
| ayush3504 | mithro: okay | 06:40 |
| *** mparuszewski has quit IRC | 06:42 | |
| ayush3504 | mithro: so i see we can fit 11 (or maybe 12) or 5 daughterboards into a 19" and half rack respectively | 06:42 |
| mithro | yeah | 06:43 |
| ayush3504 | mithro: ok | 06:43 |
| mithro | assuming the spreadsheets calculations are right | 06:43 |
| mithro | ayush3504: which I think you should probably give a good checking | 06:43 |
| ayush3504 | mithro: case width L17 is based on the material thickness right? | 06:44 |
| mithro | ayush3504: can't remember, take a look at the formula's | 06:44 |
| ayush3504 | mithro: looks correct | 06:49 |
| mithro | ayush3504: okay | 06:56 |
| mithro | ayush3504: so after looking at all that, what do you think we should set the number of daughterboard slots too? | 06:57 |
| ayush3504 | mithro: PIC18USB might be able to support 7 or 8 serial ports. I don't know whether it will be able to handle simultaneous bitbanging of the ports | 06:58 |
| ayush3504 | mithro: and VHDCI supports 6 | 06:59 |
| mithro | ayush3504: I'm interested to know how you plan to fit 6, 7 and 8 daughterboards into the space which only fits 5 | 07:00 |
| ayush3504 | mithro: i don't have plans to fit more than 5 dboards into half av rack | 07:01 |
| mithro | ayush3504: so after looking at all that, what do you think we should set the number of daughter board slots too? | 07:02 |
| ayush3504 | mithro: either we can remove one, or the 6th daughterboard can be placed arbitrary elsewhere in the case, connected with a ribbon cable | 07:04 |
| ayush3504 | mithro: for 6th dboard we can have an altered pcb with 5 slot length, and extra header for 6th slot | 07:04 |
| ayush3504 | mithro: width* | 07:04 |
| mithro | ayush3504: we could just choose to do 5 slots, right? | 07:05 |
| ayush3504 | mithro: sure | 07:05 |
| mithro | ayush3504: looking at the spreadsheet, the other number of slots is, 2 right? | 07:06 |
| ayush3504 | mithro: yeah | 07:06 |
| mithro | ayush3504: so, if we go with 5 slots, we get back a bunch of pins on the VHDCI connector right? | 07:08 |
| ayush3504 | mithro: yeah that's what I was thinking about. frees up pins for SPI as well | 07:08 |
| *** slomo has quit IRC | 07:09 | |
| *** slomo has joined #timvideos | 07:10 | |
| mithro | ayush3504: I think that probably sounds like a good idea then? | 07:11 |
| ayush3504 | mithro: sounds good to me as well | 07:11 |
| mithro | ayush3504: we should make sure it is possible to trim the same board back to 2 daughter boards too | 07:12 |
| ayush3504 | mithro: you mean laying out the board in such a way that we can cut it to 2 slot width, right? | 07:13 |
| mithro | ayush3504: yes | 07:14 |
| ayush3504 | mithro: okay | 07:14 |
| ayush3504 | mithro: would put dotted lines on slik screen for that. | 07:14 |
| mithro | SGTM | 07:17 |
| mithro | ayush3504: did the symlink method of the shared subsheets work? | 07:17 |
| mithro | ayush3504: did you end up fixing up the busses? | 07:17 |
| ayush3504 | mithro: yes it works | 07:17 |
| ayush3504 | mithro: nope didn't try that yet | 07:18 |
| mithro | ayush3504: I think getting the motherboard schematic ready should be the top priority now we have a good understanding the the slots and layout | 07:19 |
| ayush3504 | mithro: sure | 07:19 |
| mithro | ayush3504: we should get the PCB design up too | 07:22 |
| ayush3504 | mithro: ok | 07:23 |
| mithro | ayush3504: just the general layout, not all the traces and stuff | 07:23 |
| mithro | ayush3504: with the daughterboard stuff | 07:23 |
| mithro | ayush3504: I'm wondering if the daughterboard should be a "library component" or something? | 07:23 |
| ayush3504 | mithro: yes it is already similar to library component, it can be imported as a hiearchical sheet | 07:24 |
| ayush3504 | mithro: you can create a pre-customized board by pasting the "standalone" sheets in daughterboard folder to the daughterboard slot page | 07:28 |
| ayush3504 | mithro: what to do with free pins on PIC18F, LEDs? ;) | 07:39 |
| aps-sids | CarlFK: mithro: I need to travel for some university work so I might not have internet availability for next 3 days or so, but I would still be working on the project. | 09:47 |
| *** rohitksingh has joined #timvideos | 09:53 | |
| mithro | ayush3504: I was more talking from a PCB point of view | 11:09 |
| mithro | ayush3504: got anything for me to review yet? | 11:10 |
| ayush3504 | mithro: J port is free on PIC18F. what to do with it? | 11:10 |
| mithro | ayush3504: we can worry about that later I think | 11:11 |
| ayush3504 | mithro: yes, that's a good idea. daughterboard as a PCB component would help with clearances | 11:11 |
| mithro | also means you update the component once and it should update all of them | 11:16 |
| mithro | ayush3504: got something for me to review before I head home? | 12:28 |
| ayush3504 | mithro: check github. bus did not work | 12:28 |
| mithro | ayush3504: did not work is not a useful description | 12:29 |
| mithro | please explain what didn't work | 12:29 |
| ayush3504 | mithro: >200 DRC errors all suggesting that pins are not connected | 12:29 |
| ayush3504 | mithro: i've commited the changes for yo to see the schematic | 12:30 |
| mithro | okay, will look in a minute | 12:30 |
| mithro | shenki: first run boards are back from production! They look pretty awesome! | 12:34 |
| rohitksingh | mithro: Hi! You mean HMDI2USB production boards? Awesome! :) | 12:40 |
| rohitksingh | *HDMI | 12:40 |
| *** rohitksingh has quit IRC | 12:41 | |
| mithro | ayush3504: commit I should be looking at is e0792eb586bea6cecf3692d1285553a785cf0c54 right? | 12:45 |
| ayush3504 | mithro: yes | 12:46 |
| mithro | ayush3504: btw I did tell you that if you put "Issue #X" in your commit message github will automatically add the commit to the issue? | 12:47 |
| ayush3504 | mithro: oh ok, didn't know that | 12:48 |
| mithro | ayush3504: I'm sure I mentioned it in one of the git issues | 12:49 |
| mithro | ayush3504: If you write "Fixes #XX" github will even close the issue for you | 12:49 |
| mithro | ayush3504: okay - why are you still doing one huge bus? I'm sure I told you that you should be doing 1 bus per serial port? | 12:50 |
| ayush3504 | mithro: you said "With a single BUS pins need to be named 1->38, doing 1-6 multiple times is just the same set of pins, that is not what we want." | 12:51 |
| ayush3504 | mithro: that's why | 12:51 |
| mithro | ayush3504: do you see the screenshot I uploaded? | 12:52 |
| ayush3504 | mithro: yes, i saw, but you suggested it later so i did that. The bus should work whether it's 6 busses or a single bus | 12:53 |
| mithro | ayush3504: in https://cloud.githubusercontent.com/assets/4787914/3407229/c05ad15e-fda4-11e3-8d08-3e2972ae7af1.png you are using one huge bus | 12:53 |
| ayush3504 | mithro: that's old | 12:53 |
| mithro | ayush3504: with https://cloud.githubusercontent.com/assets/21212/3407454/da439f4a-fdab-11e3-98ef-7b2176a0cb28.png you are still using 1 huge bus | 12:54 |
| ayush3504 | mithro: this is also old, did you check the latest commit? | 12:54 |
| mithro | ayush3504: yes, you have continued to use one big bus rather then the multiple smaller buses I was suggesting multiple times | 12:55 |
| ayush3504 | mithro: " "With a single BUS pins need to be named 1->38, doing 1-6 multiple times is just the same set of pins, that is not what we want."" -- but then what does this mean? | 12:55 |
| mithro | ayush3504: It's referring to https://cloud.githubusercontent.com/assets/4787914/3407229/c05ad15e-fda4-11e3-8d08-3e2972ae7af1.png | 12:56 |
| ayush3504 | mithro: ok, but technically this should work: https://www.dropbox.com/s/dryxpnbm9yhc1iq/Untitled1.png | 12:58 |
| ayush3504 | mithro: and 30 pins is not huge | 12:58 |
| tpb | Title: Dropbox - Untitled1.png (at www.dropbox.com) | 12:58 |
| mithro | ayush3504: you need to use a wire between the bus and the hierarchy pin I believe... | 12:59 |
| mithro | I'm just testing now | 12:59 |
| ayush3504 | mithro: i think the bus needs to be expanded with all its pins as i did in each sheet | 13:00 |
| *** FeltonChris has quit IRC | 13:09 | |
| mithro | okay, I just tested a simple example and it works | 13:14 |
| *** FeltonChris has joined #timvideos | 13:16 | |
| ayush3504 | can you suggest a change in my schematic that would make it work, or can you share you example | 13:16 |
| ayush3504 | your* | 13:16 |
| ayush3504 | btw, a wire between the bus and hierarchy pin isn't used in the link you had shared: http://radiationlaboratories.blogspot.com.au/2011/08/kicad-how-to-use-bus-with-hierarchical.html | 13:18 |
| tpb | Title: Radiation Laboratories: Kicad: How to use a Bus with Hierarchical Labels? (at radiationlaboratories.blogspot.com.au) | 13:18 |
| mithro | git push -u origin master | 13:23 |
| mithro | opps | 13:23 |
| mithro | ayush3504: https://github.com/mithro/scratchpad | 13:23 |
| tpb | Title: mithro/scratchpad · GitHub (at github.com) | 13:23 |
| mithro | ayush3504: firstly you want to set your pin types to tri-state | 13:24 |
| ayush3504 | mithro: which ones | 13:25 |
| mithro | all the bus ones | 13:25 |
| mithro | BTW 5V / GND / etc shouldn't be type in/out | 13:25 |
| mithro | they should be type "passive" | 13:25 |
| ayush3504 | ok, those were to suggest that the PIC and VHDCI are sources and the middle sheet in a sink | 13:26 |
| ayush3504 | but, i'll do that | 13:26 |
| ayush3504 | these are not related to bus errors however | 13:27 |
| ayush3504 | the errors i get say "not connected" | 13:28 |
| mithro | okay it seems when ever you change a heirch label in the sheet you have to delete the top level label and add import it again | 13:34 |
| mithro | that fixed the bus problem | 13:35 |
| mithro | I have to run home now | 13:36 |
| ayush3504 | mithro: i tried you example. it works. | 13:36 |
| ayush3504 | mithro: "add import it again" means? | 13:36 |
| mithro | ayush3504: I'll be back in 30 minutes | 13:36 |
| mithro | On the top level, delete the pin inside the sheet block | 13:43 |
| mithro | Click the import pin tool | 13:43 |
| mithro | Add the pin back onto the sheet blocl | 13:43 |
| ayush3504 | mithro: yeah got it did that just now | 13:43 |
| ayush3504 | mithro: reduced errors to 91 | 13:43 |
| ayush3504 | mithro: putting back the top level labels fixes all | 13:45 |
| mithro | I think you need to do that any time you change the pin | 13:46 |
| mithro | Fixing the in/out of the power should fix some more | 13:47 |
| ayush3504 | mithro: ok, got it. Just wondering how reliable this feature is, since it's not documented in their documentation it seems? | 13:47 |
| ayush3504 | mithro: no, fixed all. | 13:47 |
| mithro | Please change to one bus per serial port | 13:47 |
| mithro | And document the bus pin to serial pin mapping at the top level | 13:48 |
| ayush3504 | mithro: are you sure? one big bus is easier to manage. labels get added easily pressing the Ins key | 13:48 |
| mithro | Yes. It fits more logically | 13:48 |
| ayush3504 | mithro: k | 13:48 |
| mithro | It is also clearer what happens if you chop off serial ports | 13:49 |
| mithro | You lose the bus rather then losing random pins 45 to 98 | 13:50 |
| mithro | Etc | 13:50 |
| ayush3504 | mithro: true | 13:52 |
| mithro | Plus the bus doesn't map directly to the vhdci header either | 13:55 |
| mithro | Busses are to logically group related things together | 13:56 |
| mithro | ayush3504: I'm just going to have some dinner and then go to bed | 13:57 |
| mithro | ayush3504: I'd like to see this schematic finished and a start of a template for the daughtboard PCB | 13:58 |
| ayush3504 | mithro: sure, thanks for the help | 13:58 |
| mithro | ayush3504: how is the requirements document going? | 13:59 |
| ayush3504 | mithro: much more updated than before | 14:00 |
| mithro | ayush3504: I think we should just connect port J to some general PMOD headers? | 14:04 |
| mithro | I can't think of anything else useful for it? | 14:04 |
| ayush3504 | mithro: ok, so basically it will be a header with pmod pinout | 14:05 |
| mithro | looking at the layout of the PINs for Port J (around the edge of the PIC) it's kind of got an annoying layout too | 14:05 |
| mithro | ayush3504: so we should leave it to last and only do it if we can make it work without screwing up the PCB | 14:06 |
| mithro | ayush3504: https://docs.google.com/a/mithis.com/spreadsheet/ccc?key=0ApVlNZ_Rvdw6dHpDTnpsbUxCWklxeTVLd09MM2VmdVE&usp=drive_web#gid=8 | 14:06 |
| tpb | Title: Sign in - Google Accounts (at docs.google.com) | 14:06 |
| ayush3504 | mithro: yeah, ok | 14:07 |
| mithro | it's not mapped to any useful hardware either | 14:07 |
| ayush3504 | mithro: can you tell me about the new page on spreadsheet, i don't understand it | 14:08 |
| mithro | ayush3504: you are looking at the PIC chip from above | 14:11 |
| mithro | ayush3504: each cell is a pin on the PIC chip | 14:11 |
| mithro | they are color coded into groups | 14:11 |
| ayush3504 | mithro: got it | 14:11 |
| mithro | PORTA is that dark red/brown color | 14:11 |
| mithro | etc... | 14:11 |
| mithro | just a nice way to visualize the pins | 14:12 |
| mithro | you can see how the purple, PORTJ is kind of split all over the PIC pins in a non-useful manner | 14:12 |
| ayush3504 | indeed, that's quite useful | 14:12 |
| ayush3504 | mithro: yeah, collecting them at a spot like header would make routing difficult. there will be more vias i guess | 14:15 |
| mithro | yeah | 14:16 |
| mithro | we'll see how we go | 14:16 |
| mithro | ayush3504: where did we get with making the daughterboards compatible with PMOD spec? | 14:18 |
| ayush3504 | mithro: i did that | 14:18 |
| ayush3504 | mithro: i've changed the daughterboard header if you see the daughterboard slot sheet | 14:18 |
| mithro | link? | 14:19 |
| ayush3504 | mithro: https://github.com/ayushsagar/HDMI2USB-vmodserial/commit/524fed0dafd482f60ed53f12b6d0d39333053751 | 14:19 |
| tpb | Title: Changed daughterboard slots to support Digilent PMOD and changed label n... · 524fed0 · ayushsagar/HDMI2USB-vmodserial · GitHub (at github.com) | 14:19 |
| ayush3504 | mithro: also updated the drawing | 14:19 |
| mithro | link to the drawing? | 14:20 |
| ayush3504 | mithro: https://docs.google.com/drawings/d/1_AqSdjddKz_ljB_rFfbk5SCPRbmmGxUEGUEAXW8PphE/edit | 14:20 |
| tpb | Title: Support pins and headers on daughterboard - Google Zeichnungen (at docs.google.com) | 14:20 |
| ayush3504 | mithro: it's all according to the PMOD specs you had sent | 14:21 |
| ayush3504 | mithro: the link is there in the drawing | 14:21 |
| mithro | ayush3504: what about the pin mapping? | 14:21 |
| ayush3504 | it's there in the daughterboard slot sheet in schematics | 14:22 |
| mithro | ayush3504: which one is that? | 14:23 |
| mithro | Daughterboard slots.sch ? | 14:23 |
| ayush3504 | mithro: yes | 14:24 |
| ayush3504 | mithro: https://www.dropbox.com/s/rphb813o62iq9w9/Untitled2.png | 14:24 |
| tpb | Title: Dropbox - Untitled2.png (at www.dropbox.com) | 14:24 |
| ayush3504 | mithro: compare it with page 9, http://www.digilentinc.com/Pmods/Digilent-Pmod_%20Interface_Specification.pdf | 14:25 |
| ayush3504 | mithro: don't follow the numbering | 14:25 |
| mithro | ayush3504: https://docs.google.com/a/mithis.com/spreadsheets/d/1D-GboyrP57VVpejQzEm0P1WEORo1LAIt92hk1bZGEoo/edit#gid=0 | 14:54 |
| tpb | Title: PMOD Pins - Google Tabellen (at docs.google.com) | 14:54 |
| mithro | ayush3504: so regarding the PCB, I was thinking we should look at hackvana | 14:54 |
| mithro | ayush3504: and we should target Friday | 14:55 |
| mithro | ayush3504: take a read of https://docs.google.com/a/mithis.com/document/d/1p6FH25ltGpzJQ5_8fbflDukqEKghiEcpuhJpngth2Is/edit# | 14:55 |
| tpb | Title: Hackvana PCB Q - Google Docs (at docs.google.com) | 14:55 |
| mithro | ayush3504: and ask on #hackvana if you have any questions | 14:55 |
| ayush3504 | mithro: okay | 14:55 |
| mithro | ayush3504: if we are good, we can get the boards in roughly 5ish days | 14:56 |
| mithro | ayush3504: which interface are you using for the pmod headers? | 14:56 |
| ayush3504 | mithro: gpio i guess | 14:57 |
| ayush3504 | mithro: i placed vcc and gnd at right places, rest are connected to gpios | 14:57 |
| mithro | ayush3504: here is some stuff from #hackvana | 14:58 |
| mithro | 12:39 AM <hackvana> First, take my guide and have your student read it from beginning to end, especially regarding the checking of the design. | 14:59 |
| mithro | 12:40 AM <hackvana> Second, ask for review help in here. | 14:59 |
| mithro | 12:40 AM <hackvana> Third, send me a preliminary design so I can do things like make sure the zip is basically seaworthy | 14:59 |
| mithro | 12:41 AM <hackvana> Fourth, the student should register on hackvana.com, and then send me the nickname they'd like to use in an email. | 14:59 |
| mithro | 12:41 AM <hackvana> I suggest you ask for a quote earlier than later | 14:59 |
| mithro | 12:41 AM <hackvana> Yes. If files are missing or not named correctly, or there are format errors, well it's going to take time to correct. | 14:59 |
| mithro | 12:42 AM <hackvana> I have handled several tens of thousands of PCBs. I'm basically wording you up on the most common pitfalls so your student can avoid them. | 14:59 |
| mithro | 12:58 AM <hackvana> mithro: Please get your student in here soon. We'll help them as much as we can. | 15:00 |
| mithro | ayush3504: so you should join #hackvana channel | 15:00 |
| ayush3504 | mithro: sure, thanks | 15:02 |
| mithro | Gnight | 15:14 |
| ayush3504 | good night | 15:15 |
| *** slomo_ has joined #timvideos | 17:48 | |
| *** slomo has quit IRC | 17:51 | |
| *** rohitksingh has joined #timvideos | 18:00 | |
| *** mparuszewski has joined #timvideos | 18:24 | |
| rohitksingh | any mentors online? shenki, Joelw, CarkFK, FeltonChris, and anyone who could help in hardware? mithro is probably asleep. I'm really sorry for my peculiar timings...Its just more convenient to work at night here | 18:26 |
| *** rohitksingh1 has joined #timvideos | 19:03 | |
| *** rohitksingh has quit IRC | 19:03 | |
| *** rohitksingh1 is now known as rohitksingh | 19:03 | |
| *** slomo_ has left #timvideos | 19:43 | |
| *** slomo has joined #timvideos | 20:16 | |
| *** rohitksingh has quit IRC | 22:44 | |
Generated by irclog2html.py 2.12.1 by Marius Gedminas - find it at mg.pov.lt!
