Wednesday, 2021-06-16

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-_whitenotifier-acce- [fpga-interchange-tests] acomodi opened issue #27: Change test cmake to be arch-independent - https://git.io/JnZNw11:42
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-_whitenotifier-acce- [python-fpga-interchange] acomodi opened issue #101: Add support to emit VTR XML architecture file - https://git.io/Jnnmx13:09
-_whitenotifier-acce- [vtr-verilog-to-routing] acomodi opened issue #568: Add Interchange logical netlist reading capability - https://git.io/JnnOX13:18
-_whitenotifier-acce- [vtr-verilog-to-routing] acomodi opened issue #569: Add interchange physical netlist writing capability - https://git.io/Jnn3J13:20
tpb<W​olf0> So... I was wanting to help project uray with their Ultrascale+ research. I have an XCVU33P17:50
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tpb<m​ithro> Wolf0: Take a look at the github issues on https://github.com/SymbiFlow/prjuray22:59
tpb<m​ithro> Wolf0: you can follow the process at https://symbiflow.readthedocs.io/projects/prjxray/en/latest/db_dev_process/index.html 23:01
tpb<t​pb> Title: Database Development Process — Project X-Ray 0.0-3522-g6e6bff0b documentation (at symbiflow.readthedocs.io)23:01

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