Saturday, 2020-06-06

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-_whitenotifier-f- [sv-tests] wsnyder opened issue #862: New class tests are not legal IEEE - https://git.io/Jf17H09:25
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tntCan someone confirm that ram8k_2x1_cell_macro is actually 2 bock rams of 8kbits ?  So there is only 4 of those macros in the whole fpga area in the S3 ?12:19
Loftymkurc hangs around here, right? I wanna discuss a little bit about the proposed QuickLogic flow12:48
Loftykgugala too, I think.12:48
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tntIt's definitely a LC design that's a bit un-usual.13:07
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LoftyCan you use the hard muxes to mux together LUTs?13:11
LoftyI only briefly scanned the architecture manual13:11
tntI think so.  It says it can implement a 8:1 mux in one LC.13:16
tntLUT1 is implemented with the independent 1:2 mux in the cell. So that might be why they consider it takes "less area".13:22
tntLUT2 is implemented using the same part of the LC as LUT3.13:23
LoftyOkay, I can understand that13:24
LoftyThat being said, given that the timing numbers are available I think they should take the time to use ABC913:24
tntATM I haven't build anything to the point of getting a timing report so I'm not even sure what kind of performance to expect.13:28
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LoftyHave you seen the eddie/sta branch, tnt?13:28
LoftyIf Yosys has timing information it can at least provide the logic critical path time13:29
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tntNope13:34
LoftyThis was actually created to investigate the ABC9 performance problems you've been having, tnt13:35
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tntInteresting. But note that lately, I haven't had many issues with abc9 even on ice40.13:36
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LoftyDoes flow3 make any difference for you?13:36
tntIt doesn't always help, sometimes makes it a bit worse, but that's just randomly depending on the design.13:36
tntflow3 ?13:36
Lofty"scratchpad -copy abc9.script.flow3 abc9.script" before calling the main synthesis command13:37
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shaprwow, daveshah got the power: https://twitter.com/latticesemi/status/126910229076745830516:16
tntLofty: I'll keep that 'flow3' in mind and run some tests when I get the chance.16:46
LoftySure16:46
tntAnyone know where the ql_symbiflow script is supposed to come from ?  I'm not really planning on using it, but I'd need it at least as example on how to call yosys properly for QL (I know there is more steps than just synth_quicklogic) and how to call VPR at all.16:47
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