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| sf-slack | <timo.callahan> In symbiflow-arch-defs, after redoing "make env", I redid "make all_conda", and suddently got a ton of package conflicts. Any idea what I could have done to mess up my environment, and how to clean it up? I guess I'll just do a make clean and rebuild overnight. But a higher level question -- when exactly do I need to do "make all_conda" ? Thanks! | 07:23 |
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| HackerFoo | It happens often to me. `rm -rf build/env` and try again. | 14:07 |
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| shapr | Is there a nix derivation for the whole shebang? something that gets me alllll the tools? | 15:20 |
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| HackerFoo | shapr: I had one at one point, but it's hard to keep CMake from using Conda. | 17:48 |
| HackerFoo | Maybe I'll try again. It's a pain, because Python. | 17:50 |
| HackerFoo | I have a shell.nix for VTR though: https://github.com/verilog-to-routing/vtr-verilog-to-routing/blob/master/dev/nix/shell.nix | 17:52 |
| tpb | Title: vtr-verilog-to-routing/shell.nix at master · verilog-to-routing/vtr-verilog-to-routing · GitHub (at github.com) | 17:52 |
| HackerFoo | This is what I've used, but it's kind of a mess: https://gist.github.com/HackerFoo/558c0b60e5ff75db808d8567c53734e1 | 17:59 |
| tpb | Title: What I use to work on Symbiflow on NixOS · GitHub (at gist.github.com) | 17:59 |
| HackerFoo | The problem is that dependencies often change. Maybe I can write something that parses CMakeLists.txt, but I'd rather not rely on Conda, so I need to convert the Conda package names to git revisions. | 18:07 |
| HackerFoo | I've been putting it off, hoping that the situation will get better as things stabilize. | 18:09 |
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| sf-slack | <timo.callahan> andrewb1999: you're working with Prof. DeHon? | 20:41 |
| andrewb1999 | timo.callahan: Yes I'm working with him and doing summer of code soon. | 20:50 |
| mithro | hey andrewb1999! | 20:56 |
| mithro | timo.callahan: You know Andrew? | 20:56 |
| sf-slack | <timo.callahan> I know Andre' :) | 20:58 |
| sf-slack | <timo.callahan> Andre' DeHon from UPenn -- he was at the VTR session at FPGA2020 | 20:58 |
| sf-slack | <timo.callahan> andrewb1999: did you attend the VTR meeting at FPGA? Apologies if we met and I didn't recognize your name right away. | 21:03 |
| sf-slack | <timo.callahan> (not sure if the IRC bridge copies my name -- I'm Tim Callahan, working with Tim Ansell now) | 21:04 |
| andrewb1999 | timo.callahan: No I was not at FPGA2020 | 21:04 |
| andrewb1999 | timo.callahan: Nice to meet you though, I've heard a lot about your work through Andre | 21:05 |
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| sf-slack | <timo.callahan> Yeah, I guess we were co-authors on a paper, although in our group at Berkeley we mostly worked on different stuff. | 21:10 |
| sf-slack | <timo.callahan> Anyway thanks for the Zynq PR. I was thinking of picking up a Zynq board myself... | 21:11 |
| andrewb1999 | timo.callahan: No problem! Working on cleaning up my symibflow-arch-defs changes for the 7020 and will try to get a PR in for that soon. | 21:29 |
| andrewb1999 | Today I was able to upload a few different test bitstreams without issue | 21:30 |
| sf-slack | <timo.callahan> andrewb1999: Great! I'm currently trying to put a Symbiflow-compiled, Linux-capable Litex design on an xc7a100t, which we are just adding support for now. | 22:17 |
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