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| sf-slack2 | <mkurc> @mithro @litghost I summarized my thoughts for modeling async set/reset FFs with timing in VPR in a document: https://docs.google.com/document/d/1fJeQzc3nGYEQM71kpeHHexxblx6I7CdrhAtjnZRtZXc | 15:14 |
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| tpb | Title: Google Docs - create and edit documents online, for free. (at docs.google.com) | 15:14 |
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| sf-slack2 | <kgugala> @litghost I'm looking at the LUT5/6 delays and LUT6 are smaller than LUT5. This is weird because LUT6 is made from two LUT5 and a mux. Also LUT6 delays are equal for every Ix -> O6 path. Could it be that those are not the whole path timings, but rather the mux merging two LUT5 into one LUT6? | 17:08 |
| litghost | kgugala: The current XML structure is logically valid, but may not be suitable to the timing model | 17:09 |
| sf-slack2 | <kgugala> @litghost I'm talking about what I got from 007 fuzzer | 17:09 |
| litghost | kgugala: I think the values you have are correct | 17:10 |
| sf-slack2 | <kgugala> so every LUT6 delay looks the same: | 17:10 |
| litghost | LUT6 I* -> O6 is all the same | 17:10 |
| sf-slack2 | <kgugala> (IOPATH A1 O6 (0.045::0.056)(0.1::0.124)) | 17:10 |
| litghost | Ya | 17:10 |
| sf-slack2 | <kgugala> that is why I think this is not whole path delay, but rather MUX6 one | 17:11 |
| sf-slack2 | <kgugala> otherwise they'd probably differ | 17:11 |
| sf-slack2 | <kgugala> like in LUT5 | 17:11 |
| litghost | You can always make some example designs and check the path timing in vivado if you think our understand is incorrect | 17:12 |
| litghost | However given that I've seen good critical path analysis out of VPR, I think our numbers are right | 17:13 |
| sf-slack2 | <kgugala> right now we do not define any delay for F6MUX in LUT6 | 17:15 |
| sf-slack2 | <kgugala> we have only LUT5 delays | 17:15 |
| litghost | So the F6MUX is not "real" in the SDF sense | 17:16 |
| litghost | The O6 delays are from the LUT6_2 inputs to the O6 output | 17:16 |
| sf-slack2 | <kgugala> yep | 17:16 |
| litghost | And the O5 delays from the LUT6_2 inputs to the O5 output (minus I6) | 17:16 |
| sf-slack2 | <kgugala> correct | 17:17 |
| litghost | Structurely the F6MUX is part of the combitorial path of inputs to O6 | 17:17 |
| sf-slack2 | <kgugala> yes | 17:17 |
| litghost | We need to decompose the O5 and O6 delays to accomidate how we are modeling things | 17:17 |
| litghost | Because O6 delays are fixed, that could be models as a single delay on the direct connect from the O6 to reset of SLICE | 17:18 |
| litghost | O5 is more complicated, haven't figured out how to handle it | 17:18 |
| sf-slack2 | <kgugala> I'd assume that O6 delays should be bigger than O5 | 17:18 |
| litghost | Not nessecarily | 17:18 |
| litghost | Keep in mind that logical models and timing models don't have to overlap | 17:19 |
| litghost | The actually hardware implementation may be different to allow for better timing | 17:20 |
| litghost | For example, the CARRY4 timing indicates an interesting structure on the CIN fanout | 17:20 |
| litghost | One that isn't intuitive, and doesn't match the logic design | 17:20 |
| litghost | This is not really that suprising | 17:21 |
| sf-slack2 | <kgugala> makes sense | 17:29 |
| mithro | mkurc: Please work with the upstream VtR devs to fix the async set/reset problem rather than work around it. | 17:58 |
| sf-slack2 | <mkurc> @mithro Yes, I will. I just wanted to share my thoughts regarding FFs to be sure that I didn't miss something. | 18:01 |
| mithro | kgugala: So, some of the fuzzers are still disabled in master prjxray | 18:04 |
| sf-slack2 | <kgugala> @mithro I see 41, 57 and 71 and 41 because it runs too long | 18:44 |
| sf-slack2 | <kgugala> @mithro does that prevent new timing DB generation? | 18:45 |
| mithro | kgugala: Means I have to do manual fix ups which are prone with error | 18:52 |
| sf-slack2 | <kgugala> I understand | 18:53 |
| sf-slack2 | <kgugala> so maybe we can wait with this? | 18:53 |
| sf-slack2 | <kgugala> @mithro I found a bug preventing BRAMS timings to be emited | 18:53 |
| sf-slack2 | <kgugala> @mithro also there is https://github.com/SymbiFlow/prjxray/pull/857 not yet merged | 18:54 |
| tpb | Title: Fixed fuzzer 007 to make it extract missing timings for FFs by mkurc-ant · Pull Request #857 · SymbiFlow/prjxray · GitHub (at github.com) | 18:54 |
| sf-slack2 | <tmichalak> Actually only 41 and 57 are disabled, 71 has just different dependencies because normally depends on 57 which has been disabled | 18:56 |
| mithro | kgugala: Okay, I've pushed an updated database till "Merge pull request #842 from antmicro/bits_origin" | 19:20 |
| hackerfoo | litghost: I figured out Yosys was crashing due to adding 8/16/32 bit support to RAMB36E1 in brams.txt. I don't know what I did wrong yet. | 19:24 |
| litghost | hackerfoo: Odd | 19:24 |
| sf-slack2 | <kgugala> @mithro thanks | 19:35 |
| sf-slack2 | <kgugala> @mithro so we need to wait for dependabot to bump the submodules in arch-defs or shall I do it manually in the PR? | 19:39 |
| litghost | kgugala: Update it your PR | 19:39 |
| sf-slack2 | <kgugala> ok | 19:39 |
| litghost | kgugala: If you find that other errors crop up as a result, it might be worth splitting it into two PRs | 19:39 |
| litghost | kgugala: But first shot should be update at same time | 19:40 |
| sf-slack2 | <kgugala> @litghost they do not trigger any errors in this PR - I noticed missing BRAM timings when started working on adding them there | 19:48 |
| sf-slack2 | <kgugala> @litghost we can land this PR and than I'll open a new one with missing timings | 19:49 |
| sf-slack2 | <kgugala> @litghost this way it will be easier to review them | 19:49 |
| litghost | kgugala: Yes | 19:49 |
| sf-slack2 | <kgugala> @litghost @elms @mithro I have rabased the PR, bumped the db submodule and pushed it. Please take a look https://github.com/SymbiFlow/symbiflow-arch-defs/pull/738 | 19:51 |
| tpb | Title: Arch XML timings by kgugala · Pull Request #738 · SymbiFlow/symbiflow-arch-defs · GitHub (at github.com) | 19:51 |
| litghost | Hopefully CI goes green | 19:52 |
| mithro | litghost / kgugala: Do the prjxray-db changes look good? | 20:55 |
| mithro | https://github.com/SymbiFlow/symbiflow-arch-defs/pull/799 | 20:59 |
| tpb | Title: build(deps): bump third_party/prjxray-db from `34ea6eb` to `692e9b3` by dependabot-preview · Pull Request #799 · SymbiFlow/symbiflow-arch-defs · GitHub (at github.com) | 20:59 |
| sf-slack2 | <kgugala> @mithro sdf changes look good | 21:05 |
| litghost | mithro: Some of the bipip's are missing segbits now | 21:06 |
| litghost | Example https://github.com/SymbiFlow/prjxray-db/compare/34ea6eb08a63d21ec16264ad37a0a7b142ff6031...692e9b3d9717710110204798cb18dc8fcb243fe4#diff-8234a02267482e3e4176db9f8c5717d9L1667 | 21:06 |
| tpb | Title: Comparing 34ea6eb08a63d21ec16264ad37a0a7b142ff6031...692e9b3d9717710110204798cb18dc8fcb243fe4 · SymbiFlow/prjxray-db · GitHub (at github.com) | 21:06 |
| litghost | It looks like only zynq segbits are affected, which is interesting | 21:08 |
| litghost | zynq also lost some bits in the LIOB file | 21:08 |
| sf-slack2 | <kgugala> hmm, should there be LIOB db for zynq? | 21:10 |
| sf-slack2 | <kgugala> the zynqs we support do not have left IOs | 21:10 |
| sf-slack2 | <kgugala> @litghost the timing PR is green :slightly_smiling_face: | 21:17 |
| litghost | kgugala: Which one? | 21:18 |
| sf-slack2 | <kgugala> https://github.com/SymbiFlow/symbiflow-arch-defs/pull/738 | 21:18 |
| tpb | Title: Arch XML timings by kgugala · Pull Request #738 · SymbiFlow/symbiflow-arch-defs · GitHub (at github.com) | 21:18 |
| litghost | Ah, yes | 21:18 |
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