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| rektide | anyone know of any resources talking to avalon-st vs wishbone vs axi? is there any work on tilelink? | 01:40 |
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| rektide | does anyone have suggestions for how i can understand core sizes? i dont know what i am doing yet, only just beginning, but i'd like to try to understand the impact of adding, say, an sd-card. i'm not sure what i'm adding it to yet though. this would likey be on an ecp5 85f. | 01:43 |
| rektide | third, i see two efforts on usb, the ft245 usb1.1 work in https://github.com/enjoy-digital/litex/blob/master/litex/soc/cores/usb_fifo.py and the usb3 work in https://github.com/enjoy-digital/usb3_pipe . are there any other notable projects on usb? it'd be great to be able to play around with something in-between: usb2 high-speed. | 01:52 |
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| futarisIRCcloud | rektide: join ##usbhacking - LUNA is working with usb 2.0 ULPIs | 04:32 |
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| pftbest | I am trying to debug why ethernet doesn't work and i see that ethcore.mac.core.preamble_errors increase by 1 with each received packet, is that normal? | 09:41 |
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| _florent_ | nickoe: I would first recomment starting from litex_sim and the Litescope tutorial at: https://github.com/enjoy-digital/litex/wiki/Use-LiteScope-To-Debug-A-SoC (and make sure you reproduce the results), then adapt this to your own needs. This will give you a starting point that you can progressively adapt. | 11:42 |
| _florent_ | nickoe: otherwise if you have empty .vcd, make sure the trace signal is set to 1 in the simulation: | 11:43 |
| _florent_ | https://github.com/enjoy-digital/litex/wiki/Use-LiteScope-To-Debug-A-SoC | 11:43 |
| _florent_ | sorry, wrong link, this one: https://github.com/enjoy-digital/litex/blob/master/litex/tools/litex_sim.py#L330 | 11:43 |
| _florent_ | somlo: nice for the 32-bit CSR, thanks @shorne_ | 11:44 |
| _florent_ | pftbest: with add_etherbone you should be able to ping the board yes, it's possible there is an issue on the ethphy in your case | 11:46 |
| _florent_ | pftbest: You can see the expected behavior with the simulation: litex_sim --with-etherbone and then ping the sim 192.168.1.51 | 11:47 |
| _florent_ | (on hardware the default eth ip is 192.168.1.50) | 11:48 |
| pftbest | _florent_: do you have any suggestion on how to troubleshoot issues with ethernet phy? I've got ecpix-5 board with KSZ9031 phy. I think the phy itself is working because in the litex console I can dump MDIO registers | 12:21 |
| pftbest | litex> mdio_dump 0 2 | 12:21 |
| pftbest | MDIO dump @0x0: | 12:21 |
| pftbest | 0x00 0x1140 | 12:21 |
| pftbest | 0x01 0x796d | 12:21 |
| pftbest | And the values look reasonable to me | 12:21 |
| pftbest | Unfortunately I don't have oscilloscope at hand to check the signal on RXD pins | 12:21 |
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| nickoe | _florent_: yeah, well, that is what I did. That is sarting from the litex_sim.py and then I jused added the LedChaser and I am trying to trace that. | 13:12 |
| nickoe | I do get the tracing from the CPU and stuff, but I can't find my leds. | 13:12 |
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| _florent_ | nickoe: I assume you probably added pins to the Sim Platform to add the LedChaser, so the signals in the dump should have the name of the top level outputs | 16:59 |
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| nickoe | _florent_: I linked my script before, let me find it, but yes in the sim platform | 16:59 |
| nickoe | _florent_: it looks like this, https://github.com/nickoe/litex-boards/blob/60f0ecb0e140f6eab6043e559aff2781becf849e/litex_boards/targets/mars_ax3_sim_litex.py | 17:01 |
| _florent_ | ok, and in the dump you don't see the user_led outputs? | 17:02 |
| nickoe | No, so now I just tried with "./mars_ax3_sim_litex.py --with-sdram --sdram-init=demo.bin --trace" (not using the analyzer), but just enabling the trace | 17:03 |
| nickoe | now opening gtkwave ./build/sim/gateware/sim.vcd | 17:03 |
| nickoe | Mm, I see the user_led signals in the TOP | 17:04 |
| _florent_ | nickoe: ok, litex_sim does not have a virtual user_led component, so for the LedChaser you'll just see the signals in the dump | 17:04 |
| nickoe | mm, so I thought didn't see that yesterday, but that was probably with the --with-analyzer | 17:05 |
| _florent_ | pftbest: For Ethernet on the ECPIX5, I would recommend testing the default litex-boards target with --with-ethernet: | 17:05 |
| _florent_ | https://github.com/litex-hub/litex-boards/blob/master/litex_boards/targets/ecpix5.py | 17:05 |
| nickoe | So I want to just trace my own module, such that no time is spent tracing the CPU | 17:05 |
| nickoe | and then I guess I need to use the analyzer, right? | 17:06 |
| _florent_ | pftbest: And see if you are able to boot over Ethernet: https://github.com/enjoy-digital/litex/wiki/Load-Application-Code-To-CPU#ethernet-boot | 17:06 |
| _florent_ | pftbest: you can also enable the software debug traces to see TX/RX packets: | 17:07 |
| _florent_ | pftbest: set software_debug to True here: https://github.com/enjoy-digital/litex/blob/master/litex/soc/integration/soc.py#L1349 | 17:07 |
| _florent_ | pftbest: with also Wireshark on your Host to be able to capture TX packets/ have a reference for RX packets | 17:08 |
| _florent_ | pftbest: if you see malformed packets on RX, you can try to play with the rx_delay of the PHY: | 17:09 |
| _florent_ | pftbest: https://github.com/litex-hub/litex-boards/blob/master/litex_boards/targets/ecpix5.py#L116 | 17:09 |
| nickoe | _florent_: But if I run with --with-analyzer only, I get https://dpaste.com/BPAYZC4VH | 17:09 |
| tpb | Title: dpaste: BPAYZC4VH (at dpaste.com) | 17:09 |
| _florent_ | pftbest: And once working with --with-ethernet, you could go back to --with-etherbone | 17:09 |
| nickoe | Should I run with --trace as well? | 17:09 |
| _florent_ | nickoe: --with-analyzer will generally be pretty limited compare to --trace | 17:10 |
| _florent_ | but the Analyzer can be used in simulation and also on hardware | 17:11 |
| nickoe | Yes, and that is what I want. But I may not really understand who to add the analyzer to my user_leds pins | 17:11 |
| _florent_ | for simulation, I would just recommend using --trace that gives you full visibility | 17:11 |
| _florent_ | with --trace, it's not possible to select the signals, it will just dump all the signals | 17:12 |
| nickoe | ok | 17:12 |
| nickoe | But can I use the analyzer on any of the led signals? I would expect it to be able to trace the pins at least, or am I wrong? | 17:12 |
| _florent_ | yes you should be able to do this | 17:13 |
| nickoe | I may not fully understand the syntax used to add signals to the analyzer. | 17:13 |
| _florent_ | in the analyzer, you can add something like platform.lookup_request("user_led", x) with x = 0, 1, 2, 3 | 17:14 |
| nickoe | Because I get that attribute error. | 17:14 |
| nickoe | or type error in that paste at lest. | 17:14 |
| _florent_ | you just need to provide a list of signals | 17:14 |
| nickoe | I got my pin definition: https://github.com/nickoe/litex-boards/blob/mars_ax3_sim/litex_boards/targets/mars_ax3_sim_litex.py#L65-L68 | 17:16 |
| nickoe | I add the LedChaser https://github.com/nickoe/litex-boards/blob/mars_ax3_sim/litex_boards/targets/mars_ax3_sim_litex.py#L276-L280 | 17:16 |
| nickoe | I attempt to add the pads of the module to the analyzer https://github.com/nickoe/litex-boards/blob/mars_ax3_sim/litex_boards/targets/mars_ax3_sim_litex.py#L304 | 17:16 |
| nickoe | but with that I get AttributeError: 'Cat' object has no attribute 'name_override | 17:16 |
| nickoe | ok, I just missed the lookup_request thing, will try | 17:18 |
| nickoe | _florent_: I guess I can't just add the LedChaser module and get all signals from inside that? | 17:18 |
| nickoe | mm, litex.build.generic_platform.ConstraintError: Resource not found: user_led:4 | 17:19 |
| nickoe | mm, litex.build.generic_platform.ConstraintError: Resource not found: user_led:4 | 17:19 |
| nickoe | ah, zero index | 17:19 |
| nickoe | So I run it and ctrl+c the simulation.. it errors with this: https://dpaste.com/DLZ3MRPY5 | 17:21 |
| tpb | Title: dpaste: DLZ3MRPY5 (at dpaste.com) | 17:21 |
| nickoe | I wonder if that is the same issue as described breifly here https://github.com/enjoy-digital/litex/issues/831 | 17:22 |
| nickoe | _florent_: Or is there a better way to abort the simulation at will? | 17:22 |
| _florent_ | can you try adding if to the analyzer with: platform.lookup_request("user_led", x)? | 17:22 |
| nickoe | _florent_: "if"? I am not sure what you mean. I can push my latest. | 17:26 |
| nickoe | the with x thing didn't work so I just added them explicitly for now, https://github.com/nickoe/litex-boards/blob/mars_ax3_sim/litex_boards/targets/mars_ax3_sim_litex.py#L304-L307 | 17:27 |
| nickoe | It appears to works with the --trace option, but with --with-analyzer only I don't get traces, and I am not running with --sim-debug, so self.comb += platform.trace.eq(1) should be set always. | 17:34 |
| _florent_ | nickoe: with --with-analyzer, you have to use litex_server and litescope_cli to get your dump: | 17:41 |
| _florent_ | https://github.com/enjoy-digital/litex/wiki/Use-LiteScope-To-Debug-A-SoC | 17:42 |
| nickoe | hmm, ok, I thought it would trace as it appears to attempt to write a vcd | 17:43 |
| _florent_ | The analyzer is storing the captured data in a RAM of the SoC that needs to be read through the bridge once captured | 17:43 |
| _florent_ | no, the analyzer is a hardware module that is demonstrated in the simulation but mostly useful on real hardware | 17:44 |
| _florent_ | That's similar to Chipscope/SignalTap/Reveal tools | 17:45 |
| nickoe | I can start the simulation with etherbone and see the ip in "ip a", but I can't seem to get "litex_server --udp --udp-ip=192.168.1.51" to connect to it.. | 17:46 |
| nickoe | althoguh the remote appears to get "192.168.1.100" and not .51. but changing it ... still no luck | 17:47 |
| nickoe | "Exception: Unable to probe Etherbone server at 192.168.1.100." | 17:47 |
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| _florent_ | nickoe: once the simulation is started, are you able to ping 192.168.1.51? | 17:53 |
| rozpruwacz | Hi, I'm using linux-on-litex-vexrisc project with de0nano board. I successfuly added the litespi core and i can send data through it from within linux. Now i want to add spi device with interrupt line. How i can add gpio input interrupt to the soc and use it with linux ? I was trying to add GPIOIn module but i don't know how to handle it from linux | 17:55 |
| rozpruwacz | side (seems to me that litex,gpio driver does not support interrupts). | 17:55 |
| _florent_ | Hi rozpruwacz, the interrupt has been recently added on the GPIO input, so that's indeed possible it's not yet supported by the Linux driver | 17:57 |
| nickoe | yes, I can ping .51 | 17:59 |
| rozpruwacz | _florent_ oh great :) is someone working on it or I can try to add support for it ? It would be fun way to get familiar with riscv for me :) | 18:02 |
| nickoe | hmm, now it did connect. odd. | 18:03 |
| _florent_ | rozpruwacz: I don't think anyone is working on this currently, this could indeed be a good way to get familar with riscv and contribute | 18:05 |
| _florent_ | rozpruwacz: if you are stuck, somlo, shenki_ or shorne_ would probably be happy to discuss linux driver related issues/questions | 18:09 |
| rozpruwacz | _florent_ ok, thanks. | 18:12 |
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| pftbest | _florent_: thanks for the advice. It appears both rx and tx works when using with-ethernet. I don't have a linux image to test full netboot, but I see in wireshark that the board is able to receive ARP replies and I see both tx and rx data in the UART log | 19:11 |
| pftbest | that is good news i think, it means my board is not damaged | 19:12 |
| pftbest | but it doesn't explain why etherbone doesn't work while ethernet is ok :( | 19:28 |
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| _florent_ | pftbest: ah, but it's also possible the timings are not met with Etherbone on this board. Some work has been done on that but it's not yet merged, I'll try to integrate it in the next weeks. | 20:06 |
| pftbest | _florent_: I don't see any timing errors in the log https://dpaste.com/HNVKTLJYN.txt | 20:08 |
| pftbest | Or do you mean some other timings? | 20:08 |
| _florent_ | It seems fine yes | 20:15 |
| _florent_ | I also have an ECPIX5, I'll try to do some tests next week with Etherbone on it | 20:16 |
| pftbest | _florent_: that would be great, thank you | 20:16 |
| pftbest | I will also try to build the linux for this board to check how it behaves | 20:18 |
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