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| haier | Hi, I when I compile my own linux kernel (instead of using the precompiled one) for linux-on-litex-vexriscv, I get a kernel panic at boot because it cannot read the scratch register from the soc controller. I placed a couple of printk's in litex_soc_ctrl.c and found out that the resource returned by platform_get_resource has correct name ( | 01:35 |
|---|---|---|
| haier | soc_controller@f0000000)and start address (0xf0000000), but an end address of res->end == 0x0, although the dts file specifies it should be 0xf000000c. And this is why I suspect the kernel panic (cant read scratch register) happens, because nothing of the IO space is actually mapped. Has anyone an idea of how to fix this? The build/sim/sim.dts reg | 01:35 |
| haier | entry is correct: reg = <0xf0000000 0xc>; | 01:35 |
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| dkozel | _florent_: Wow. How are you connecting the SATA drive to the CLE? | 11:21 |
| dkozel | That looks like one of the generic USB to PCIe bitcoin carriers | 11:22 |
| dkozel | teknoman117: the LiteFury is the same PCB (as far as I know) to the Acorn CLE-215 which is also in the litex-boards repo | 11:24 |
| dkozel | I'm running both the Aller and CLE-215+ with litepcie | 11:24 |
| _florent_ | teknoman117: hi, sorry i haven't seen your message here and answer on the issue, I'll provide an example for the Acorn/LiteFury with 128-bit data with PCIe in the next days | 11:56 |
| _florent_ | dkozel: yes with a modded PCIe riser, bitcoin mining is very useful to get cheap FPGA dev boards/hardware :) | 11:58 |
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| teknoman117 | you're right, it does look like the same PCB. I didn't realize. | 17:50 |
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