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| benh | _florent_: so I grabbed one of those Acorn CLE-215+, gosh that fan noise is annoying ! :-) | 04:23 |
|---|---|---|
| benh | _florent_: I'll get the jtag sorted and will probably use it for playing with Microwatt+LiteX... do you guys have SW to put on the host side of the PCIe ? | 04:23 |
| benh | I want to take out that fan but that means I also want to monitor the temperature :) | 04:24 |
| benh | do you know of a way to figure out if it's a speed grade 2 or 3 other than removing the heatsink ? | 04:25 |
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| futarisIRCcloud | Almost all the CLE-215+ are speed grade 2. If you want speed grade 3, the CLE-101 might be... I don't think anyone has checked those. | 05:11 |
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| _florent_ | benh: there is a simple driver to access simple periperals and operate the DMA | 06:34 |
| _florent_ | benh: you can get the driver and generate the header for it by adding --driver argument to the target | 06:36 |
| _florent_ | https://github.com/litex-hub/litex-boards/blob/master/litex_boards/targets/acorn_cle_215.py#L8 | 06:36 |
| tpb | Title: litex-boards/acorn_cle_215.py at master · litex-hub/litex-boards · GitHub (at github.com) | 06:36 |
| _florent_ | benh: i just created two issues for things that should be easy for a software person :): | 06:37 |
| _florent_ | https://github.com/enjoy-digital/litepcie/issues/34 | 06:37 |
| tpb | Title: Allow MMAP access to BAR0 without loading kernel driver · Issue #34 · enjoy-digital/litepcie · GitHub (at github.com) | 06:37 |
| _florent_ | https://github.com/enjoy-digital/litepcie/issues/35 | 06:37 |
| tpb | Title: Create /dev/ttyX device on Host to access crossover UART when kernel driver is loaded · Issue #35 · enjoy-digital/litepcie · GitHub (at github.com) | 06:37 |
| _florent_ | I haven't really looked at it yet, but that could ease using targets with PCIe | 06:38 |
| _florent_ | aslo created: https://github.com/enjoy-digital/litepcie/issues/36 | 06:41 |
| tpb | Title: Check PCIe bus rescan after loading bitstream. · Issue #36 · enjoy-digital/litepcie · GitHub (at github.com) | 06:41 |
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| atommann | Hi _florent_, I tried to boot from a SDCard but failed. | 06:45 |
| _florent_ | atommann: so you just tested the default kc705 support in linux-litex-vexriscv? | 06:46 |
| atommann | I just read the discussion between pdp7 and somlo (IRC log on 2020-03-27), seems that some specific type of SD card must be used. | 06:47 |
| atommann | Yes, I didn't use the pre-built binaries. I used the generated files. | 06:48 |
| atommann | Do I need to use some special recipes? | 06:49 |
| _florent_ | atommann: we currently only support SDCard >= version 2.0 | 06:49 |
| _florent_ | atommann: can you share your bitstream, i have a kc705 near me and could test | 06:49 |
| atommann | OK. soon I'll email it to you. | 06:51 |
| _florent_ | ok thanks | 06:51 |
| atommann | sent | 07:05 |
| atommann | Oh, I guess the problem is my SD card is below version 2.0. | 07:08 |
| atommann | Now I go out to grab an adapter to try the "HC" ones. | 07:09 |
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| _florent_ | atommann: thanks for your bistream, i tested it with 2 SDCard and it was working. There are still probably corner cases we need to catch with SDCard boot, so it's possible if you have issues with SDCards that should be supported (>=version2.0), please fill an issue. | 07:31 |
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| benh | _florent_: heh ok... I was looking at acorn*.py and couldn't quite figure out how the uart is hooked up ... I'll dig again tonight or tomorrow | 08:01 |
| benh | I assume you have two uarts register sets, one litex "core" side and one pcie side with fifos in between ? | 08:02 |
| _florent_ | benh: yes exactly, that's what is done when using the crossover uart, we create 2 UARTs: one for the CPU, one for us and both are interconnected | 08:28 |
| _florent_ | https://github.com/enjoy-digital/litex/blob/master/litex/soc/cores/uart.py#L381-L397 | 08:29 |
| tpb | Title: litex/uart.py at master · enjoy-digital/litex · GitHub (at github.com) | 08:29 |
| jaseg | Hey there, I'm having some trouble getting the etherbone bridge to work on nexys video (xc7a200t w/ RGMMII GbE). I got TFTP bootloading to work with no trouble at all. | 08:44 |
| jaseg | When the host probes the device over UDP the device only sometimes responds. This response always looks garbled: The UDP packet's headers look alright but the content is some random byte repeated (like 00 00 00 00 or 4f 4f 4f 4f ) and there is always 8 more bytes in the packet than idicated in the UDP header. | 08:45 |
| jaseg | Is there some tutorial/doc on etherbone w/ RGMII? I've only been able to find some code examples but I'm still a bit unclear on e.g. what clocking the phy/udp/etherbone cores expect. | 08:46 |
| jaseg | I'm using the liteeth/litex master branches and the spinalhdl openocd fork as described in https://github.com/timvideos/litex-buildenv/wiki/Debugging | 08:47 |
| tpb | Title: Debugging · timvideos/litex-buildenv Wiki · GitHub (at github.com) | 08:47 |
| _florent_ | jaseg: are you able to ping the board correctly? | 08:51 |
| jaseg | _florent_: yes, it responds to pings but the ICMP echo replies contain only null bytes and also contain 8 extra bytes at the end | 08:55 |
| _florent_ | jaseg: also with the default integration, you need to use a sys_clk > 125MHz for the etherbone bridge to work at 1Gbps | 08:55 |
| _florent_ | jaseg: if you clock is below that, you can set clock_domain to "sys" here: https://github.com/enjoy-digital/litex/blob/master/litex/soc/integration/soc.py#L1180 | 08:57 |
| tpb | Title: litex/soc.py at master · enjoy-digital/litex · GitHub (at github.com) | 08:57 |
| _florent_ | sorry i should add some assertions on that and improve integration | 08:58 |
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| TMM | hi | 08:58 |
| TMM | futarisIRCcloud: I made it! :) | 08:59 |
| _florent_ | TMM: hi | 09:02 |
| atommann | Hi _florent_, I went to get a 4G SDHC card and it just boots! so cool. | 09:03 |
| atommann | And it's pretty fast. | 09:05 |
| _florent_ | atommann: great, it's still using SPI-mode on the KC705, but i'm working on SD-mode that will increase speed a bit :): https://twitter.com/enjoy_digital/status/1276124497649819650 | 09:05 |
| atommann | _florent_, Do you think the "wifi-SD card idea" is doable? | 09:07 |
| jaseg | _florent_: that seems to be the problem. So if I instantiate it with add_etherbone(phy=..., clock_domain='sys') it should work with only a 100Mhz sys clock? In that case, where do the 125MHz come from? Is that derived from the RGMII's clock or do I have to supply it from the system PLL? | 09:07 |
| atommann | but netboot is also convenient while testing Linux driver and other stuff. | 09:08 |
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| _florent_ | jaseg: when setting clock_domain="sys", the ethcore will run in eth_tx clock domain (so at 125MHz) and the clock domain crossing will be done in the Etherbone core | 09:11 |
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| jaseg | _florent_: that was the problem, it's working now. Thank you for the help! | 09:13 |
| _florent_ | jaseg: great! | 09:14 |
| _florent_ | i will improve this to avoid this problem | 09:15 |
| _florent_ | atommann: wifi SD cards could probably work yes, but i never tested such cards | 09:16 |
| _florent_ | atommann: but netboot will probably be easier/faster | 09:16 |
| atommann | OK. I'll buy a card and try out. | 09:17 |
| _florent_ | wifi SD cards would be interesting with boards that don't have Ethernet | 09:17 |
| _florent_ | with FT254 FIFO we also have interesting upload speed (600KB/s) | 09:18 |
| _florent_ | with a UART baudrate of 3Mbauds it's 250KB/s | 09:19 |
| _florent_ | with ValentyUSB it's around 160KB/s | 09:19 |
| _florent_ | so that's already acceptable for the size of the binaries we currently have | 09:19 |
| TMM | Oh, this looks like an interesting project! | 09:21 |
| zyp | how come ValentyUSB is so slow? | 09:22 |
| TMM | Has anyone had any luck symbiflow and litex? | 09:22 |
| _florent_ | zyp: haven't really looked, i just used it | 09:24 |
| _florent_ | TMM: the arty target can be build with symbiflow | 09:25 |
| _florent_ | build/built | 09:25 |
| _florent_ | https://github.com/enjoy-digital/litex/blob/master/litex/boards/targets/arty.py | 09:25 |
| tpb | Title: litex/arty.py at master · enjoy-digital/litex · GitHub (at github.com) | 09:25 |
| _florent_ | ./arty.py --toolchain=symbiflow --build | 09:26 |
| _florent_ | you can find more info here: https://github.com/enjoy-digital/litex/blob/master/litex/boards/targets/arty.py | 09:26 |
| tpb | Title: litex/arty.py at master · enjoy-digital/litex · GitHub (at github.com) | 09:26 |
| _florent_ | and here: https://github.com/enjoy-digital/litex/issues/554 | 09:26 |
| tpb | Title: improve Symbiflow/Arty support · Issue #554 · enjoy-digital/litex · GitHub (at github.com) | 09:26 |
| TMM | _florent_: ah, cool! | 09:28 |
| TMM | _florent_: I know next to nothing about fpgas though, is the arty board a good starting point? | 09:31 |
| _florent_ | TMM: yes that's really a nice board, probably the one i use the most | 09:34 |
| TMM | _florent_: not that it is immediately very important for my project, but what kind of risc-v speeds can be achieved on that board? | 09:35 |
| _florent_ | we run the CPU at 100MHz generally, but 125MHz also works | 09:40 |
| _florent_ | jaseg: i just removed the clock_domain parameter from add_etherbone and made the ethcore always run in eth_tx clock domain: https://github.com/enjoy-digital/litex/commit/23a95bea1d40b35708be7237ef580ac18b9e5b9f | 09:41 |
| tpb | Title: integration/soc/etherbone: always run ethcore in eth_tx clock domain … · enjoy-digital/litex@23a95be · GitHub (at github.com) | 09:41 |
| TMM | 100MHz is enough for my purposes. :) | 09:41 |
| TMM | Basically my goal is to build a computer from chips, I've done it before with 8bit micros. I've built some 6502 and z80 computers and some weird multi-processor things. I want to build something now that could theoretically be at least a little useful. My original plan was to use 68k processors but those aren't really available anymore. I've also looked into some power chips. Someone suggested I look at risc-v but the asics for sale are all highly | 09:45 |
| TMM | integrated SoCs which I don't really want. Plopping a single chip on a board doesn't really seem very challenging as a project. So I was thinking maybe prototyping a cpu and some peripherals in an fpga then, en later designing a board with several of those fpgas on it, some dram slots and headers etc. | 09:45 |
| TMM | Does that sound like something that could at least in theory work? The alternative would be I guess to buy some NXP power cores and build a board. There's not a lot else out there now that's not a soc with integrated everything | 09:45 |
| TMM | I think integrated dram controllers and pcie is ok. The alternative would probably be some power cpus with a not-really-optional northbridge which is effectively the same anyway | 09:46 |
| _florent_ | interesting, LiteX could provide you a good framework for that to integrate the different cores in different FPGAs (SoCs) and make them communicate | 09:50 |
| jaseg | _florent_: thanks, that sounds like a good solution. | 09:56 |
| zyp | TMM, the problem is that once you plop down a fpga for the cpu, it gets kinda hard to justify doing stuff outside the fpga that would be easier to just put in the fpga next to the cpu | 09:56 |
| TMM | zyp: that's probably true, maybe if I set my goals to be higher than can fit on a single fpga? I want to make a computer that's a bit more like an Amiga than say a PC, that is I want to have a bunch of kind of specialized 'chips' to do things rather than have a lot of 'raw cpu' power. (There's no need for this computer to be particularly practical, I want it to be fun to use and program) | 10:00 |
| zyp | anything that can fit in two fpgas can also fit in one larger fpga :) | 10:01 |
| zyp | up until the fpgas don't get larger, but you've run out of money well before then | 10:02 |
| TMM | right, but I guess a constraint may be that symbiflow won't support the very biggest ones? :) | 10:03 |
| zyp | I don't think you need a particularly big FPGA to fit the full feature set of an Amiga | 10:04 |
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| atommann | Hi _florent_, how can I mount the SD card? (can not see the /dev/sd* device) | 10:08 |
| TMM | zyp: well, the goal isn't to make an amiga clone but I understand your point. It's probable that the stuff I'm actually able to design will fit in a moderately sized fpga by itself | 10:09 |
| daveshah | No idea how Litex does it but do you have a /dev/mmcblk* device? | 10:09 |
| daveshah | That is what Linux uses for real SD/MMC ports | 10:09 |
| atommann | no, can't see any /dev/mmc* device. | 10:10 |
| benh | futarisIRCcloud: ok. is there a way to check other than removing the heatsink ? | 10:23 |
| _florent_ | atommann: sorry we need to update the kernel build in linux-on-litex-vexriscv to enable SD/MMC in Linux: https://github.com/litex-hub/linux-on-litex-vexriscv/issues/139 | 10:25 |
| tpb | Title: Kernel panic when enabling spisdcard · Issue #139 · litex-hub/linux-on-litex-vexriscv · GitHub (at github.com) | 10:25 |
| _florent_ | probably just a configuration issue, but i haven't been able to look at it yet | 10:26 |
| atommann | Thanks. | 10:29 |
| benh | TMM: there are enough Amiga clones out there already :-) | 10:47 |
| benh | I bought a minimig board a few years back ... in order to turn it into a Mac+ :-) That was my first real experience tackling fpgas (verilog back then) | 10:47 |
| somlo | atommann: if you're using spi-mode sdcard, this kernel: https://github.com/litex-hub/linux/tree/litex-rocket-rebase works for me, with this DT setting: https://github.com/gsomlo/riscv-pk/blob/gls-litex-devel/machine/litex_rocket.dts#L110 | 10:53 |
| tpb | Title: GitHub - litex-hub/linux at litex-rocket-rebase (at github.com) | 10:53 |
| somlo | (kernel should be backward-compatible with 32-bit CPUs like vexriscv, even though it says "rocket" :) | 10:54 |
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| somlo | for proper SD-mode (litesdcard), I still have to replicate _forent_'s latest update on twitter, before trying the antmicro litex_mmc driver (and tweaking it until it works in linux) | 10:57 |
| atommann | Hi somlo, thanks, I'll try. | 10:58 |
| somlo | _florent_, what was the trellisboard command line you used to build the bitstream for that litesdcard boot demo on twitter? | 11:07 |
| atommann | The "wifi sd card method" is not possible, I asked two suppliers, they only supports one-way transferring. | 11:48 |
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| somlo | atommann: having never heard of a "wifi sd card" before today, I had to look it up :) Appears to be a thing that acts as a regular SD card (over the SD card pins), but also allows being *read* over wifi (even while mounted as an SD card) | 11:55 |
| somlo | I guess the part where it's read-only over wifi is what makes it unhelpful as a workaround for the lack of other networking options on, e.g., an fpga dev board | 11:56 |
| atommann | These wifi sd cards are designed for old cameras. | 12:01 |
| atommann | I am checking if Toshiba FlashAir cards support upload function. | 12:02 |
| futarisIRCcloud | wifi sd cards are generally an ARM system that also supports a sd device. | 12:04 |
| futarisIRCcloud | benh: from the thread on eevblog, it seems that you can't find speed grade from inside the FPGA. | 12:05 |
| atommann | it's possible with FlashAir, people use it with 3D printers. | 12:10 |
| atommann | https://blog.prusaprinters.org/easy-wireless-printing-with-flashair-sd-cards_8603/ | 12:10 |
| tpb | Title: How to set up wireless printing with Toshiba FlashAir SD cards - Prusa Printers (at blog.prusaprinters.org) | 12:10 |
| futarisIRCcloud | FT245 gives reasonable speed considering USB Full-Speed is only 12Mbps | 12:12 |
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| pdp7 | atommann: | 12:54 |
| pdp7 | oops | 12:54 |
| pdp7 | atommann: i have tried recently but i want to | 12:55 |
| pdp7 | i bought a 4GB and 8Gb, 16GB and 64GB | 12:55 |
| pdp7 | i hope one will work :) | 12:55 |
| pdp7 | _florent_: is there a list of suggested cards to buy? | 12:55 |
| pdp7 | i just grabbed some one from amazon.de but in the hopes one would work | 12:55 |
| somlo | atommann, pdp7, _florent_: litesdcard *used* to be picky about which cards it would work with a while back (when pdp7 and I had that conversation). Then, around the time of commit 5cc7a988, I was able to use all my cards with both spi-mode and litesdcard | 12:59 |
| atommann | Thanks for this message. | 13:01 |
| somlo | even *more* recent changes to litesdcard broke it completely for me (on all models of sd card, whether they used to work with the old version or not) but afaik _florent_ isn't done updating litesdcard yet, so I assume all (most) recent sdcards will end up working OK :) | 13:01 |
| atommann | It's good to know :) | 13:03 |
| somlo | atommann: as of right now, spi-mode is rock solid, but the linux spi-mmc driver adds a LOT of overhead, so it's much slower in linux than on bare-metal | 13:04 |
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| pdp7 | thanks | 13:27 |
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| _florent_ | somlo: i'm testing LiteSDCard with https://github.com/litex-hub/linux-on-litex-vexriscv | 14:18 |
| tpb | Title: GitHub - litex-hub/linux-on-litex-vexriscv: Linux on LiteX-VexRiscv (at github.com) | 14:18 |
| _florent_ | ./make.py --board=trellisboard --build --load | 14:19 |
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| somlo | _florent_: oh, I'll have to figure out how to extract a "standard" litex build command from that | 14:29 |
| somlo | one obvious candidate for what's different from what I've been doing is probably the csr-data-width... Let me try with 8, see if I can get something wiggling that way | 14:30 |
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| _florent_ | somlo: i could sent you the next bitstream i test if you want, just to see if you reproduce my results with your different sdcards | 15:21 |
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| somlo | _florent_:ok, please do that, thanks! -- btw, I built linux-on-litex-vexriscv bitstreams for both trellisboard and nexys4ddr but when I push it to the board with openocd (I skipped the "--load" part), I get garbage on the terminal | 15:58 |
| somlo | is the linux-on-litex-vexriscv using a different terminal baud rate (i.e., not 115200)? | 16:02 |
| _florent_ | somlo: the baudrate is 1000000 | 16:15 |
| somlo | oh, with that baud rate I can boot the nexys4ddr bitstream and load a boot.bin blob (it's the wrong blob, since it's a rocket bbl+kernel payload, but load it I can) | 16:17 |
| somlo | now, I need to figure out what else is different (besides the baud rate) between a bitstream built within linux-on-litex-vexriscv and a "proper" upstream-litex one | 16:18 |
| _florent_ | somlo: i will also look at this, i'm using linux-on-litex-vexriscv because it's convenient to see if the images are loaded correctly (linux booting), but the default targets should also work | 16:23 |
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| _florent_ | somlo: --csr-data-width=32 makes the default target work | 16:35 |
| somlo | _florent_: I've been using --csr-data-width=32 all along (unsuccessfully). What's the full command line you used for the default target? | 16:42 |
| _florent_ | ./trellisboard.py --with-sdcard --integrated-rom-size=0x10000 --csr-data-width=32 --build --load | 16:43 |
| somlo | thanks, trying that now... | 16:46 |
| somlo | _florent_ -- I'll have to dig into it a bit more systematically, since for me, using that command (without the --load part, which I'm doing manually via openocd), it still hangs | 18:25 |
| somlo | probably some weird thing I'm doing wrong, but looks like I will have to figure it out the "maximum effort" route :D | 18:26 |
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| TMM | I think I'm going to go the FPGA route, I think it'll be fun to implement some custom instructions for my little machine, and it seems that that should all be at least achievable with litex :) | 19:58 |
| TMM | I'll see how I'm going to fashion a 'computer' out of it later I suppose. Building the OS and monitor thing I was planning to do is probably going to be the hard part | 19:59 |
| somlo | TMM: LiteX is (in its most general form) a 'computer' -- you get a wishbone bus, with a choice of CPUs as the master, and a choice of peripherals (ethernet, sdcard, uart, etc, etc.) as slaves. It's possible to use some of the peripherals as standalone IP blocks, or to connect a new CPU to drive the "computer", or to connect additional (non-LiteX) IP blocks to the wishbone bus | 20:17 |
| somlo | so if you bring your own CPU, you'll get a LiteX computer with a new cpu model (in addition to what's already supported) | 20:18 |
| somlo | oh, and AXI is also supported in addition to WB, so if your CPU or peripherals already have an AXI interface and no WB, you can connect them as well | 20:19 |
| TMM | Nice | 21:23 |
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