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| somlo | _florent_, zyp: with PR 569 I think I took care of .data initialization on mor1kx; this leaves microwatt, which doesn't have a fragment zeroing out .bss I can use for assembly pattern-matching :) | 01:11 |
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| mithro | benh_ probably knows how to do the microwatt one | 03:30 |
| mithro | dkozel: Is there anywhere I should be following along on the on the gr-verilog stuff? I'm very interested in people demonstrating the potential of FPGAs tools to be used in the flow of another system -- the glasgow is kind of an awesome example of this | 03:33 |
| mithro | dkozel: But an actual "acceleration" example would be super interesting | 03:33 |
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| keesj | litex spiflash doesn't build for me any more it looks like ff.c has been moved to fat but the makefile lacks behind | 09:22 |
| keesj | make: *** No rule to make target '/home/why/projects/litex/litex/litex/soc/software/liblitesdcard/ff.c', needed by 'ff.o'. Stop | 09:23 |
| keesj | hmm the problem is gone when i did a rm of ff.o | 09:25 |
| keesj | (still some implicit declaration of function 'write_to_flash') in cmds/cmd_spiflash.c | 09:25 |
| benh_ | mithro: somlo: I can, tell me what you are doing and I'll sort it out | 09:31 |
| benh_ | best is shoot me an email | 09:31 |
| benh_ | I can look at it later this week | 09:32 |
| benh_ | _florent_: liteeth interrupt is edge or level ? | 09:32 |
| benh_ | (in general, in litex, interrupts are edge or level ?) | 09:32 |
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| zyp | benh_, we made some changer to the linker script that now requires every crt0 to inititialize the .data segment | 10:40 |
| zyp | and microwatt/crt0 is the only one remaining now | 10:41 |
| somlo | zyp, sent an email to benh_ (didn't have your email so couldn't cc you, sorry) | 11:07 |
| somlo | with links to github issues/PRs, etc. | 11:07 |
| zyp | ah, good | 11:08 |
| benh_ | zyp: what do you mean by initialize the data segment ? | 11:30 |
| benh_ | ok I'll check out the issues ... you mean bss ? | 11:30 |
| zyp | both needs to be initialized | 11:51 |
| zyp | all the others were already doing .bss, so we just had to fix .data | 11:52 |
| zyp | for microwatt, both should be added | 11:52 |
| benh_ | yeah ok I see, you XIP from a ROM so you need to copy data to RAM | 13:23 |
| benh_ | standard stuff, shouldn't take long when I get a chance to look | 13:23 |
| benh_ | will do | 13:23 |
| keesj | the arty target in the litex repo has some new strangeness https://github.com/enjoy-digital/litex/blob/master/litex/boards/targets/arty.py#L75 e.g. if symbiflow the frequency is lowered and no ddf controller is added. | 13:34 |
| tpb | Title: litex/arty.py at master · enjoy-digital/litex · GitHub (at github.com) | 13:35 |
| keesj | is this for emulation? | 13:35 |
| keesj | simluation | 13:36 |
| futarisIRCcloud | keesj: It's what is built at: https://github.com/SymbiFlow/symbiflow-examples/tree/master/examples/xc7/linux_litex_demo | 14:45 |
| tpb | Title: symbiflow-examples/examples/xc7/linux_litex_demo at master · SymbiFlow/symbiflow-examples · GitHub (at github.com) | 14:45 |
| futarisIRCcloud | And spiflash is deprecated. Best to boot over serial, tftp or sd card. | 14:46 |
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