Friday, 2020-01-31

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xobsmithro: I really need to get a dev board that I can actually use...00:13
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futarisIRCcloudxobs: What dev board(s) do you have?00:46
xobsfutarisIRCcloud: fomu. I've also got a HaD proto2 badge that chews through batteries.  Guess I've also got a Betrusted.00:50
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xobsWell I managed to strip a bunch of stuff out of the litex bios, so now I have it fitting into the 8 kB of ROM we have.  Now to try and replicate mithro's issue.01:40
xobsmithro: Yeah, I am seeing that writing into "uart_rxtx" isn't causing any data to appear in "uart_xover_rxtx".01:44
xobsmithro: scratch that, it looks like it's working if I actually let the build finish, and upload a gateware that actually has the crossover port in it!01:59
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xobsWeird bugs.  Now I'm tracking down a Windows-only panic that seems to be caused by a race condition in the terminal.02:48
xobsNo, not a race condition.  It just panics if you don't capture the mouse on Windows.02:59
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xobsOoh, also found an issue in Windows Terminal Preview that causes the cursor to go to (0,0) on exit. That doesn't happen in cmd.exe or powershell. I'll have to report that one.04:32
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sajattackwhat is lxterm supposed to do after `[LXTERM] Starting....` when loading linux?04:40
sajattackit seems to hang there but I can't be sure04:40
sajattacknevermind04:44
sajattackI didn't realize the linux image build was separate from the gateware build04:49
sajattackcould use a progress bar :P05:06
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sajattackayyy lmao https://hastebin.com/ayonevufam.cs05:50
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sajattackhow would I go about copying files to linux over uart?06:43
sajattackperhaps easiest way would be to modify rootfs.cpio?06:56
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Claudesajattack , If you are lucky the sz and rz commands are available. That's z modem send and receive .07:45
sajattackno dice07:46
Claudecat then :)07:46
sajattackwhat's the uart device called?07:46
sajattackinside linux07:46
ClaudeTransferring files using serial console - Krzysztof Adamski (https://k.japko.eu/serial-transfers.html)07:47
tpbTitle: Transferring files using serial console - Krzysztof Adamski (at k.japko.eu)07:47
sajattackok I'll try that07:47
_florent_andresfcalderon: your board support seems fine, can you try using lxterm instead of flterm? https://github.com/enjoy-digital/litex/blob/master/litex/tools/litex_term.py or lower the UART baudrate?08:05
tpbTitle: litex/litex_term.py at master · enjoy-digital/litex · GitHub (at github.com)08:05
_florent_sajattack: good that you got Linux booting, i'll review your PR08:07
sajattackthanks08:08
sajattackClaude: I can't get minicom to work, can I do it with picocom?08:09
Claudedon't know sajattack08:10
sajattackthanks for the merge _florent_08:16
sajattackwant my linux-on-litex changes too? or wait until I get vga going?08:16
_florent_sajattack: yes sure, you can create a PR for the linux-on-litex-vexriscv too, i just renamed SDRAMSoC to MiSTerSDRAMSoC to make it clear this is using the MiSTer SDRAM extension, so you will just need to update that08:34
_florent_we could merge the vga after when it will be workign08:34
sajattackok cool08:49
mithro_florent_ / xobs: Have you noticed that the BIOS recently got a lot bigger?08:51
sajattackhttps://github.com/litex-hub/linux-on-litex-vexriscv/pull/92 _florent_09:04
tpbTitle: Add DE10 Nano using MiSTer SDRAM add-on board by sajattack · Pull Request #92 · litex-hub/linux-on-litex-vexriscv · GitHub (at github.com)09:04
xobssajattack: I did a horrible thing by gzipping files and then doing "cat > file.b64; base64 -d file.b64 > file.gz; gunzip file.gz"09:06
xobsmithro: In order to get it to fit into 8 kB, I used small crc16/crc32, disabled `number()` (by having it print out 'x' instead), and removed `memtest`.09:07
_florent_mithro: no, i haven't noticed BIOS got a lot bigger recently, but haven't been looking at the numbers, i just know that default rom size is still fine09:27
_florent_sajattack: thanks, merged09:28
sajattack🎉09:30
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tumbleweedso, _florent_ is https://github.com/timvideos/litex-buildenv/pull/310 correct? That seems to be a change from 0x40000000 to 0xe0000000, or is that offset being applied somewhere else that I don't see?10:29
tpbTitle: shadow_base was replaced by base_address by stefanor · Pull Request #310 · timvideos/litex-buildenv · GitHub (at github.com)10:29
_florent_tumbleweed: yes this is fine. Note that is you are using upstream LitePCIe, you can even remove the lambda a: 1, since i added it as default decoder10:33
tumbleweedOK, now the board is showing up with the wrong PCI device ID10:36
tumbleweedI'm not sure where that's defined10:36
tumbleweedyeah, I'll tidy that up10:37
_florent_tumbleweed: the PCI device ID is here: https://github.com/enjoy-digital/litepcie/blob/master/litepcie/software/kernel/config.h#L911:03
tpbTitle: litepcie/config.h at master · enjoy-digital/litepcie · GitHub (at github.com)11:03
_florent_do you have 7021?11:03
mithro_florent_: PTAL at https://github.com/enjoy-digital/litex/pull/369/files -- I've rewritten it11:05
tpbTitle: WIP: Attempt at doing a better add_memory_region by mithro · Pull Request #369 · enjoy-digital/litex · GitHub (at github.com)11:05
_florent_mithro: thanks, the usage seems closer to what i had in mind than your previous PR and the implementation is probably better than my solution, i'll will review it and test it11:18
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mithro_florent_: I still need to actually make it work11:29
mithro_florent_: But wasn't going to spend time making it work if it still horrified you :-P11:29
tumbleweed_florent_: how does that get into the gateware?11:44
tumbleweedand yes, I was getting 702111:44
xobsmithro: for uart, what sort of failure are you seeing?11:54
mithroxobs: More it wasn't working and I wasn't sure why11:54
xobsOh. Using a recent wishbone-tool and a recent litex?11:55
tumbleweed_florent_: 02:00.0 Memory controller: Xilinx Corporation Device 702112:01
_florent_tumbleweed: https://github.com/enjoy-digital/litepcie/commit/061418c620cb09e32aafc202ed1379a29c49cc1712:09
tpbTitle: software: add support for X1/X2/X4 default Xilinx Device IDs · enjoy-digital/litepcie@061418c · GitHub (at github.com)12:10
_florent_i changed the way LitePCIe wraps the PHY recently and it's now using 7021 for the Gen2 X1 config and 7024 for the Gen2 X412:11
tumbleweedaha, thanks12:14
tumbleweedOK, so the same driver should work with either ID12:14
tumbleweed_florent_: the next thing I got was pci_read_config_byte(pdev, PCI_REVISION_ID, &rev_id) -> 012:15
tumbleweedand if I hack around that, I get a grumpy kernel: https://paste.debian.net/1128476/12:20
tpbTitle: debian Pastezone (at paste.debian.net)12:20
tumbleweedfrom https://github.com/timvideos/litex-buildenv/tree/master/software/hdmi2pcie/kernel12:21
tpbTitle: litex-buildenv/software/hdmi2pcie/kernel at master · timvideos/litex-buildenv · GitHub (at github.com)12:21
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_florent_tumbleweed: sorry, i would need to have a closer look to understand what is going on. BTW, i put a few days ago a new driver there: https://github.com/enjoy-digital/netv2/tree/master/software and validated it with the NeTV213:05
tpbTitle: netv2/software at master · enjoy-digital/netv2 · GitHub (at github.com)13:05
tumbleweed_florent_: yeah kgugala was saying he had been hacking on that in the netv2 repo, and things were working13:08
Claude_florent_: regarding the ddr3 on ecp5 . Indeed it seems that the ODT Pin is on a static 1 level . This means the ddr3 chip always terminates the DQ bus13:21
ClaudeThis could explain my heat/high current draw13:22
Claude_florent_: yes I can confirm . I pulled odt on the ddr3 chip permanent low (odt disabled , selected by the chip mode registers ) and my current draw  is 200mA less and heat much lower13:34
_florent_mithro, kgugala: linux booting in simulation with LiteDRAM and the DFI model pre-initialized with the binaries: https://github.com/litex-hub/linux-on-litex-vexriscv/issues/84#issuecomment-58073990313:53
tpbTitle: sim: use SDRAM DFI model for simulation · Issue #84 · litex-hub/linux-on-litex-vexriscv · GitHub (at github.com)13:53
_florent_Claude: interesting! Could you eventually create an issue on https://github.com/enjoy-digital/litedram/issues for this?13:55
tpbTitle: Issues · enjoy-digital/litedram · GitHub (at github.com)13:55
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kgugala_florent_: awesome14:27
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sajattackhttps://github.com/litex-hub/linux-on-litex-vexriscv/pull/92 _florent_ 🎉17:00
tpbTitle: Add DE10 Nano using MiSTer SDRAM add-on board by sajattack · Pull Request #92 · litex-hub/linux-on-litex-vexriscv · GitHub (at github.com)17:00
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sajattacklol did I fall on the paste key?18:32
sajattackoh, it was up arrow plus enter18:34
sajattacksorry18:34
sajattackI guess I shouldn't go to bed with my laptop if I'm gonna be sleep-pinging ppl18:35
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scanakciatommann: it may be related to clock frequency that you have used. You can try to use a higher clock frequency. If you check logs, I had a similar  problem in the past and using a higher frequency helped me pass memory tests with vexriscv.21:09
scanakcitoday I had a chance to present Litex and BlackParrot on BARC (https://bostonarch.github.io/2020/). In case you @_florent_ get some questions  after today related to presentation&Litex, do not be surprised :)21:14
tpbTitle: BARC 2020 (at bostonarch.github.io)21:14
_florent_scanakci: ah ok thanks. Are the slides of the presentation available?21:33
scanakcinot sure if they will make them publicly available. I can share it if they do not21:34
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