Tuesday, 2019-12-10

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somlo_florent_: My first pass at documenting LiteX CSRs: https://github.com/enjoy-digital/litex/issues/31415:21
tpbTitle: We need to document LiteX CSRs! · Issue #314 · enjoy-digital/litex · GitHub (at github.com)15:21
somloa few of the things I'm still not 100% clear about (including the intra-subregister endianness) shown as "FIXME", hope github will let us edit each others' comments, but if not, I'm happy to edit it myself until it's ready for being turned into a PR :)15:23
_florent_somlo: thanks! (sorry i still have to look at your results from yesterday)15:58
somlo_florent_: no worries, whenever you get a chance. When you do, I'll work your response into the new CSR.md candidate (it's one of the FIXMEs in there now) :)16:04
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dkozelHello folks. I'm looking around to see if anyone has already written board support files for the Aller Artix-7 card?20:53
dkozelOne is on its way to me soon and I'm hoping to get litepcie and litedram running before the GNU Radio hackfest at the end of January20:54
dkozelI'll open a PR with one if it hasn't been done before.20:57
kc8apfI've been working on a platform definition for PicoEVB which is very similar. Litepcie and litedram should just work once you have a platform defining the top level I/O connections21:20
_florent_dkozel: https://github.com/litex-hub/litex-boards/blob/master/litex_boards/partner/platforms/aller.py22:00
tpbTitle: litex-boards/aller.py at master · litex-hub/litex-boards · GitHub (at github.com)22:00
_florent_https://github.com/litex-hub/litex-boards/blob/master/litex_boards/partner/targets/aller.py22:00
tpbTitle: litex-boards/aller.py at master · litex-hub/litex-boards · GitHub (at github.com)22:00
_florent_dkozel: i know Rohit tested LiteDRAM/LitePCIe with it22:01
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dkozelah! I was looking in different repos than that!22:21
dkozelThanks _florent_22:21
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